Cache memories have a strong impact on the response time of tasks executed on modern computing platforms. For tasks scheduled under fixed-priority preemptive scheduling (FPPS), the worst-case response time (WCRT) analyses that account for cache persistence between jobs along with cache related preemption delays (CRPDs) have been shown to dominate analyses that only consider CRPDs. Yet, the existing approaches that analyze cache persistence in the context of WCRT analysis can only support direct-mapped caches. In this work, we analyze cache persistence in the context of WCRT analysis for set-associative caches. The main contributions of this work are: (i) to propose a solution to find persistent cache blocks (PCBs) of tasks considering set-a...
In the presence of caches, preemptive scheduling may incur a significant overhead referred to as cac...
Schedulability analyses for preemptive real-time systems need to take into account cache-related pre...
With the advent of increasingly complex hardware in real-time embedded systems (processors with perf...
28th Euromicro Conference on Real-Time Systems (ECRTS 2016). 5 to 8, Jul, 2016. Toulouse, France.Out...
3rd Doctoral Congress in Engineering will be held at FEUP on the 27th to 28th of June, 2019This work...
Work in Progress Session, IEEE Real-Time Systems Symposium (RTSS 2016). 29, Nov to 2, Dec, 2016. Por...
When designing hard real-time embedded systems, it is required to estimate the worst-case execution ...
In preemptive real-time systems, scheduling analyses need - in addition to the worst-case execution ...
23rd IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2017, Pittsburg, PA, US...
In this paper, abstract interpretation is applied to the problem of predicting the cache behavior of...
Abstract — Schedulability analysis for real-time systems has been the subject of prominent research ...
To compute a worst-case execution time (WCET) estimate for a program running on a safety-critical ha...
Tasks running on microprocessors with cache memories are often subjected to cache related preemption...
While caches have become invaluable for higher-end architectures due to their ability to hide, in pa...
Abstract The assumption of task independence has long been consubstantial with the formulation of ma...
In the presence of caches, preemptive scheduling may incur a significant overhead referred to as cac...
Schedulability analyses for preemptive real-time systems need to take into account cache-related pre...
With the advent of increasingly complex hardware in real-time embedded systems (processors with perf...
28th Euromicro Conference on Real-Time Systems (ECRTS 2016). 5 to 8, Jul, 2016. Toulouse, France.Out...
3rd Doctoral Congress in Engineering will be held at FEUP on the 27th to 28th of June, 2019This work...
Work in Progress Session, IEEE Real-Time Systems Symposium (RTSS 2016). 29, Nov to 2, Dec, 2016. Por...
When designing hard real-time embedded systems, it is required to estimate the worst-case execution ...
In preemptive real-time systems, scheduling analyses need - in addition to the worst-case execution ...
23rd IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2017, Pittsburg, PA, US...
In this paper, abstract interpretation is applied to the problem of predicting the cache behavior of...
Abstract — Schedulability analysis for real-time systems has been the subject of prominent research ...
To compute a worst-case execution time (WCET) estimate for a program running on a safety-critical ha...
Tasks running on microprocessors with cache memories are often subjected to cache related preemption...
While caches have become invaluable for higher-end architectures due to their ability to hide, in pa...
Abstract The assumption of task independence has long been consubstantial with the formulation of ma...
In the presence of caches, preemptive scheduling may incur a significant overhead referred to as cac...
Schedulability analyses for preemptive real-time systems need to take into account cache-related pre...
With the advent of increasingly complex hardware in real-time embedded systems (processors with perf...