A 3-mW concurrent 2.4/5.2-GHz dual-band low-noise amplifier for WLAN applications in 0.18-mu m CMOS technology

[[abstract]]A concurrent 2.4/5.2-GHz dual-band monolithic low-noise amplifier implemented with a 0.18-mum mixed-signal CMOS technology is reported for the first time. This LNA only consumed 3-mW power, and achieved minimum noise figures of 3.3 and 3.26 dB and 2.4 and 5.2 GHz, respectively. Input and output return losses more than 10 dB were obtained at both 2.4 and 5.2 GHz. In addition, IIP3 of 17 and 5 dBm were achieved at 2.4 and 5.2 GHz, respectively. No off-chip components were required for input and output matching. To our knowledge, this LNA exhibits a state-of-the-art performance. Due to the careful selection of the size of the transistors and the passive elements in our proposed method power matching and noise matching can be achieved simultaneously at the dual-band of interest. (C) 2004 Wiley Periodicals, Inc.[[note]]SC