High-coupling and ultra-lowloss interlaced stacked transformers for 60-100-GHz CMOS RFIC applications

[[abstract]]In this article, we demonstrate that high-coupling and ultra-low-loss transformers for 60-100-GHz CMOS RFIC applications can be achieved by using single-turn two-layer interlaced stacked (STIS) structure implemented in a standard CMOS technology. State-of-the-art GA. of 0. 711, 0.922, and similar to 1 (i.e., NFmin of 1.48, 0.35, and similar to 0 dB) were achieved at 60, 80, and 100 GHz, respectively, for a STIS transformer with an inner dimension of 50 X 50 mu m(2) and a metal width of 5 Am, mainly due to the high inagnetic-coupling factor and the high resistive-coupling factor. In addition, a 94.1% (front 5.61 to 10.89) and a 196.8% (from 8.36 to 24.81) increase in Q-Jactor, a 14.2% (from 0.711 to 0.812), and an 8.5% (from 0.922 to similar to 1) increase in G(Amax) and a 0.58 dB (from 1.48 to 0.90 dB) and a 0.35 dB (from 0.35 to similar to 0 dB) decrease in NF,in were achieved at 60 and 80 GHz, respectively, for the transformer after the post-process of proton implantation. The present analysis is helpful for RF engineers to design ultra-low-voltage highperformance 60-100-GHz transfonner-feedback CMOS (or BiCMOS) LNAs and VCOs, and other RF-ICs which include transformers. (C) 2007 Wiley Periodicals, Inc.[[note]]SC