International audienceThe performance and energy efficiency provided by lightweight many-cores is undeniable. However, the lack of rich and portable support for these processors makes software development challenging. To address this problem, we propose a portable and lightweight MPI library (LWMPI) designed from scratch to cope with restrictions and intricacies of lightweight manycores. We integrated LWMPI into a distributed OS that targets these processors and evaluated it on the Kalray MPPA-256 processor. Results obtained with three applications from a representative benchmark suite unveiled that LWMPI achieves similar performance scalability in comparison with the low-level vendor-specific API narrowed for MPPA-256, while exposing a ric...
This paper reports on the development of an MPI/OpenCL implementation of LU, an application-level be...
This technical report describes some lessons learned from implementing the Message Passing Interface...
Multicore architectures require parallel computation and explicit management of the memory hierarchy...
International audience—Power dissipation and energy consumption has become a major issue for high pe...
International audienceLightweight manycores stand out for their performance, but lack on programmabi...
The demand for high processing power together with the actual concern about power consumption has le...
International audienceLightweight manycores deliver high performance and scal-ability at low power c...
In recent years, programmable many-core accelerators (PMCAs) have been introduced in embedded system...
International audienceLightweight manycores belong to a new class of emerging lowpower processors fo...
AbstractThe Kalray MPPA®-256 is a single-chip manycore processor that integrates 256 user cores and ...
Looking at the TOP 500 list of supercomputers we can see that different architectures and networking...
In recent years rapid revolution of Multiprocessor System-on-Chip (MPSoC) poses new challenges for p...
International audienceSUMMARY The constant need for faster and more energy-efficient processors has ...
Many-core architectures, such as the Intel Xeon Phi, provide dozens of cores and hundreds of hardwar...
The processing of massive amounts of data on clusters with finite amount of memory has become an imp...
This paper reports on the development of an MPI/OpenCL implementation of LU, an application-level be...
This technical report describes some lessons learned from implementing the Message Passing Interface...
Multicore architectures require parallel computation and explicit management of the memory hierarchy...
International audience—Power dissipation and energy consumption has become a major issue for high pe...
International audienceLightweight manycores stand out for their performance, but lack on programmabi...
The demand for high processing power together with the actual concern about power consumption has le...
International audienceLightweight manycores deliver high performance and scal-ability at low power c...
In recent years, programmable many-core accelerators (PMCAs) have been introduced in embedded system...
International audienceLightweight manycores belong to a new class of emerging lowpower processors fo...
AbstractThe Kalray MPPA®-256 is a single-chip manycore processor that integrates 256 user cores and ...
Looking at the TOP 500 list of supercomputers we can see that different architectures and networking...
In recent years rapid revolution of Multiprocessor System-on-Chip (MPSoC) poses new challenges for p...
International audienceSUMMARY The constant need for faster and more energy-efficient processors has ...
Many-core architectures, such as the Intel Xeon Phi, provide dozens of cores and hundreds of hardwar...
The processing of massive amounts of data on clusters with finite amount of memory has become an imp...
This paper reports on the development of an MPI/OpenCL implementation of LU, an application-level be...
This technical report describes some lessons learned from implementing the Message Passing Interface...
Multicore architectures require parallel computation and explicit management of the memory hierarchy...