This paper reports a simple fabrication process of Si "twin nano wires" based on As dopant effect which gives rise to a significant increase of the oxidation rate at the peak concentration of As. The processing procedures consist of As doping, deposition of silicon nitride layer, electron beam lithography, reactive ion etching, wet oxide and deposition of polysilicon. The resulting Si "twin nano wires': have a small top wire with a dimension of 10 nm and a triangular channel wire with a height of 250 nm. A possible application of the "twin nano wires" to a future single-electron memory device on silicon on insulator (SOI) wafer is also discussed
[[abstract]]A new method is proposed for fabricating silicon nanowires (SiNWs) on silicon substrates...
This report describes a series of process and device simulation experiments of Group IV silicon nano...
Si nanowires (SiNWs) as building blocks for nanostructured materials and nanoelectronics have attrac...
This paper reports a simple fabrication process of Si "twin nano wires" based on As dopant effect wh...
This paper describes a robust process for the fabrication of highly doped Silicon-On-Insulator nanow...
This paper describes a robust process for the fabrication of highly doped Silicon-On-Insulator nanow...
Some current fabrication technologies of SOI nano devices are reviewed in this paper. By means of ar...
In this paper, we report a method of fabricating silicon nano-wire based on thermal oxidation techni...
This article describes for the first time the controlled monolayer doping (MLD) of bulk and nanostru...
[[abstract]]We propose a promising fabrication technology for single-electron transistors based on a...
This article describes for the first time the controlled monolayer doping (MLD) of bulk and nanostru...
Metal-assisted chemical etching (MACE) has gained great interest for the preparation of vertically a...
We report the single-electron tunneling behaviour of a silicon nanobridge where the effective island...
The process for the fabrication of devices based on a single silicon nanowire with a triangular sect...
This paper reports on the fabrication of a silicon-on-insulator nano flash memory device based on th...
[[abstract]]A new method is proposed for fabricating silicon nanowires (SiNWs) on silicon substrates...
This report describes a series of process and device simulation experiments of Group IV silicon nano...
Si nanowires (SiNWs) as building blocks for nanostructured materials and nanoelectronics have attrac...
This paper reports a simple fabrication process of Si "twin nano wires" based on As dopant effect wh...
This paper describes a robust process for the fabrication of highly doped Silicon-On-Insulator nanow...
This paper describes a robust process for the fabrication of highly doped Silicon-On-Insulator nanow...
Some current fabrication technologies of SOI nano devices are reviewed in this paper. By means of ar...
In this paper, we report a method of fabricating silicon nano-wire based on thermal oxidation techni...
This article describes for the first time the controlled monolayer doping (MLD) of bulk and nanostru...
[[abstract]]We propose a promising fabrication technology for single-electron transistors based on a...
This article describes for the first time the controlled monolayer doping (MLD) of bulk and nanostru...
Metal-assisted chemical etching (MACE) has gained great interest for the preparation of vertically a...
We report the single-electron tunneling behaviour of a silicon nanobridge where the effective island...
The process for the fabrication of devices based on a single silicon nanowire with a triangular sect...
This paper reports on the fabrication of a silicon-on-insulator nano flash memory device based on th...
[[abstract]]A new method is proposed for fabricating silicon nanowires (SiNWs) on silicon substrates...
This report describes a series of process and device simulation experiments of Group IV silicon nano...
Si nanowires (SiNWs) as building blocks for nanostructured materials and nanoelectronics have attrac...