Substrate crosstalk and RF losses in HR-SOI, and the introduction of a stabilized polysilicon layer are deeply investigated. A new equivalent lumped circuit to model different substrate types and resistivities, and SiO/sub 2/-Si interface qualities is proposed and validated by simulation and experimental data. It is also valid to model the introduction of high-trap density at the interface, and it successfully explains the higher measured values of substrate crosstalk at low frequencies for HR-Si substrates.Anglai
International audienceWe report on a novel technique for localized interface passivation in High-Res...
This paper describes low-frequency measurements and comparative analysis of methods used for surface...
For the last five years the semiconductor industry has evolved from a quest to get more logic and co...
In this paper, we investigate the impact of a passivation layer on the performance of a commercial h...
High resistivity (HR) silicon wafers are promising candidates for RF applications due, mainly, to th...
In this work, we investigate the impact of distinctly processed trap-rich layers of polysilicon inse...
As CMOS technology continues to scale down, allowing operation in the GHz range, it provides the opp...
This paper provides an overview of the issues associated with parasitic surface conduction (PSC) in ...
Crosstalk propagation through silicon substrate is a serious limiting factor on the performance of t...
Substrate crosstalk into standard and trap-rich high-resistivity silicon (HR-Si) substrates over a w...
HR-SOI technology is currently addressing mobile challenges allowing heterogeneous integration on a ...
For planar RF structures made on oxidized High Resistivity (HR) Si substrates, it is fundamental to ...
This work analyzes crosstalk phenomena in SOI-SIMOX substrates by means of two-dimensional device si...
High Resistivity (HR) Si substrates with resistivity values higher than 3 kΩ.cm have been demonstrat...
We propose in this letter a new passivation method to get rid of parasitic surface conduction in oxi...
International audienceWe report on a novel technique for localized interface passivation in High-Res...
This paper describes low-frequency measurements and comparative analysis of methods used for surface...
For the last five years the semiconductor industry has evolved from a quest to get more logic and co...
In this paper, we investigate the impact of a passivation layer on the performance of a commercial h...
High resistivity (HR) silicon wafers are promising candidates for RF applications due, mainly, to th...
In this work, we investigate the impact of distinctly processed trap-rich layers of polysilicon inse...
As CMOS technology continues to scale down, allowing operation in the GHz range, it provides the opp...
This paper provides an overview of the issues associated with parasitic surface conduction (PSC) in ...
Crosstalk propagation through silicon substrate is a serious limiting factor on the performance of t...
Substrate crosstalk into standard and trap-rich high-resistivity silicon (HR-Si) substrates over a w...
HR-SOI technology is currently addressing mobile challenges allowing heterogeneous integration on a ...
For planar RF structures made on oxidized High Resistivity (HR) Si substrates, it is fundamental to ...
This work analyzes crosstalk phenomena in SOI-SIMOX substrates by means of two-dimensional device si...
High Resistivity (HR) Si substrates with resistivity values higher than 3 kΩ.cm have been demonstrat...
We propose in this letter a new passivation method to get rid of parasitic surface conduction in oxi...
International audienceWe report on a novel technique for localized interface passivation in High-Res...
This paper describes low-frequency measurements and comparative analysis of methods used for surface...
For the last five years the semiconductor industry has evolved from a quest to get more logic and co...