A high-performance single-instruction, multiple-data (SIMD) processor based on a full-custom VLSI chip has been designed for binary image processing applications. This dedicated IC has been fabricated in a 3- mu m NMOS technology and contains 48000 transistors. The architecture of the processor is described, and the chip description, which includes an original organization for both the data path and image memories, is highlighted. The processor is fully operational. It is used in applications like filtering, skeletonization, feature extraction, document processing, and optical character recognition.Anglai
Many media processing algorithms suffer from long execution times, which are most often not acceptab...
A new smart-sensor VLSI circuit intended for focal-plane processing of grey-scale images is presente...
The goal of this thesis was to create a processor using VHDL that could be used for educational purp...
International audienceA high-speed analog VLSI image acquisition and low-level image processing syst...
International audienceA high speed analog VLSI image acquisition and low-level image processing syst...
Abstract A high speed analog VLSI image acquisition and low-level image processing system is present...
Abstract — In this paper we present a vision processor, which incorporates a 160×80 SIMD array of pi...
A high-speed analog VLSI image acquisition and low-level image processing system are presented. The ...
This paper presents novel high speed vision chips based on multiple levels of parallel processors. T...
A programmable vision chip for real-time vision applications is presented. The chip architecture is ...
Vision chips are microelectronic devices which combine image sensing and processing on a single sili...
A new ASIC coprocessor has been designed binary image processing applications. This dedicated IC has...
This paper proposes a novel programmable vision chip based on multiple levels of parallel processors...
A programmable vision chip with variable resolution and row-pixel-mixed parallel image processors is...
Abstract — An FPGA implementation of a fine grain general-purpose SIMD processor array is presented....
Many media processing algorithms suffer from long execution times, which are most often not acceptab...
A new smart-sensor VLSI circuit intended for focal-plane processing of grey-scale images is presente...
The goal of this thesis was to create a processor using VHDL that could be used for educational purp...
International audienceA high-speed analog VLSI image acquisition and low-level image processing syst...
International audienceA high speed analog VLSI image acquisition and low-level image processing syst...
Abstract A high speed analog VLSI image acquisition and low-level image processing system is present...
Abstract — In this paper we present a vision processor, which incorporates a 160×80 SIMD array of pi...
A high-speed analog VLSI image acquisition and low-level image processing system are presented. The ...
This paper presents novel high speed vision chips based on multiple levels of parallel processors. T...
A programmable vision chip for real-time vision applications is presented. The chip architecture is ...
Vision chips are microelectronic devices which combine image sensing and processing on a single sili...
A new ASIC coprocessor has been designed binary image processing applications. This dedicated IC has...
This paper proposes a novel programmable vision chip based on multiple levels of parallel processors...
A programmable vision chip with variable resolution and row-pixel-mixed parallel image processors is...
Abstract — An FPGA implementation of a fine grain general-purpose SIMD processor array is presented....
Many media processing algorithms suffer from long execution times, which are most often not acceptab...
A new smart-sensor VLSI circuit intended for focal-plane processing of grey-scale images is presente...
The goal of this thesis was to create a processor using VHDL that could be used for educational purp...