Influence of Fluorine Implant on Threshold Voltage for Metal Gate FDSOI and MuGFET

The effective work function (WF) of the gate stack sets the threshold voltages of fully depleted, thin-body MOSFETs. For high-performance (HP) CMOS, the required WF is +/- 0.2eV away from mid-bandgap, while a single mid-bandgap WF satisfies the requirements of low-power (LP) CMOS.[1] SoC applications require the integration of three WF gate stacks on the same chip. Fluorine (F) implant can modulate the effective WF through the creation of negative charge states at the Si and dielectric interfaces [2]. Domae et al. reported a 300mV Vt shift in FDSOI NMOS with 1x1014/cm2 F implant dose [3]. In this paper, we examine the feasibility of using F implants to achieve multiple Vt for planar FDSOI and MuGFETs with a single metal gate. We found a large amount of negative charges are generated at the Si/BOX interface by the F implant and are responsible for high Vt shift in FDSOI, but these charges have little influence on the MuGFET Vt