In this paper, the impact of important geometrical parameters such as source and drain thickness, fin spacing, spacer width, etc. on the parasitic fringing capacitance component of multiple-gate field-effect transistors (MuGFET) is deeply analyzed using finite element simulations. Several architectures such as single gate, FinFETs (double gate), triple-gate represented by Pi-gate MOSFETs are simulated and compared in terms of channel and fringing capacitances for the same occupied die area. Simulations highlight the great impact of diminishing the spacing between fins for MuGFETs and the trade-off between the reduction of parasitic source and drain resistances and the increase of fringing capacitances when selective epitaxial growth (SEG) t...
This is a review paper on the topic of multiple gate field effect transistors: MuGFETs, or FinFETs, ...
With the continued scaling of field-effect transistors (FETs) we have past the point where short-cha...
The influence of fin-line-edge roughness (fin-LER) and gate-LER on multiple-gate (MG) tunnel field-e...
Report for the scientific sojourn carried out at the Université Catholique de Louvain, Belgium, fro...
In this paper, we have systematically investigated parasitic effects due to the gate and source-drai...
This paper analyzes the geometry-dependent parasitic components in multifin double-gate fin field-ef...
This paper studies the geometry-dependent parasitic components in multi-fin FinFETs. Compared with c...
Abstract—Recently, the first generation of mass production of FinFET-based microprocessors has begun...
The parasitics in multi-gate transistors (MugFETs or FinFETs) are expected to significantly degrade ...
In this paper, a semi-analytical extrinsic gate capacitance model for Triple Gate FinFET, based on t...
Bulk and novel MOSFET structures with gate-lengths in the 30nm regime are expected to become industr...
In this paper, we investigate capacitive effect of multi-fins FinFET using the TCAD simulations. The...
In this letter, we report the enhanced fringe capacitance in FinFETs when compared to the equivalent...
This last decade silicon MOSFETs have demonstrated their potentialities for very high frequency appl...
10.1109/SISPAD.2006.282883International Conference on Simulation of Semiconductor Processes and Devi...
This is a review paper on the topic of multiple gate field effect transistors: MuGFETs, or FinFETs, ...
With the continued scaling of field-effect transistors (FETs) we have past the point where short-cha...
The influence of fin-line-edge roughness (fin-LER) and gate-LER on multiple-gate (MG) tunnel field-e...
Report for the scientific sojourn carried out at the Université Catholique de Louvain, Belgium, fro...
In this paper, we have systematically investigated parasitic effects due to the gate and source-drai...
This paper analyzes the geometry-dependent parasitic components in multifin double-gate fin field-ef...
This paper studies the geometry-dependent parasitic components in multi-fin FinFETs. Compared with c...
Abstract—Recently, the first generation of mass production of FinFET-based microprocessors has begun...
The parasitics in multi-gate transistors (MugFETs or FinFETs) are expected to significantly degrade ...
In this paper, a semi-analytical extrinsic gate capacitance model for Triple Gate FinFET, based on t...
Bulk and novel MOSFET structures with gate-lengths in the 30nm regime are expected to become industr...
In this paper, we investigate capacitive effect of multi-fins FinFET using the TCAD simulations. The...
In this letter, we report the enhanced fringe capacitance in FinFETs when compared to the equivalent...
This last decade silicon MOSFETs have demonstrated their potentialities for very high frequency appl...
10.1109/SISPAD.2006.282883International Conference on Simulation of Semiconductor Processes and Devi...
This is a review paper on the topic of multiple gate field effect transistors: MuGFETs, or FinFETs, ...
With the continued scaling of field-effect transistors (FETs) we have past the point where short-cha...
The influence of fin-line-edge roughness (fin-LER) and gate-LER on multiple-gate (MG) tunnel field-e...