Design of SOI CMOS circuits robust to combined effects of process corners variation, high temperature and radiations

The design of integrated circuits robust to harsh environments is one of the most challenging issues to modern electronic systems. In the past, the radiation damaging effects were only considered for space applications, nuclear power and military needs. Today, radiation impacts concern a large field of applications, such as medical equipments, biomedical and aeronautic electronics. Furthermore, due to the space weather variability, the radiation disturbs more and more the higher performance digital electronics, even at sea level. Another challenge facing electronic circuits is the increase in temperature requirements up to 175 °C in automotive, which will be increased in the future to over 200 °C such as for aerospace and oil exploration. However, the increase in temperature seriously degrades the functionality of electronic circuits. The main objective of this thesis is to design electronic circuits which can sustain simultaneous radiation and high temperature effects in advanced CMOS technologies. Therefore, process variations also have to be taken into account simultaneously. The first part of the thesis studies the combined effects of radiation and temperature on electronic devices and circuits developed in partially-depleted Silicon-on-Insulator (PD SOI) technologies. The choice of SOI is motivated by its attractive features: extended range of operating temperatures, lower sensitivity to transient radiation effects (SEE) compared to other technologies and high robustness to total ionizing dose (TID) effects when a thin gate/buried oxide is used. The second part of the thesis proposes new mitigation techniques against process variations, radiation and temperature effects on analog circuits. These mitigation techniques are based on the negative feedback and the body biasing techniques.(FSA - Sciences de l) -- UCL, 201