FinFET technology development guidelines for higher performance, lower power, and stronger resilience to parameter variations

The impact of the fin thickness and the gate oxide thickness on the electrical characteristics of FinFETs is studied in this paper. FinFET technology development guidelines for enhancing the on-current, suppressing the leakage currents, and weakening the sensitivity to parameter variations are provided. A sub-threshold slope lower than 100mV is achieved with a fin thinner than half of the gate length in a 32nm FinFET technology. The maximum on-current to leakage current ratio is achieved when the fin thickness and the oxide thickness are 8nm and 1.6nm, respectively, in a 32nm FinFET technology. A fin thickness between one fourth and one half of the gate length is preferred for enhanced tolerance to parameter fluctuations. © 2009 IEEE