The performance of a non-blocking ATM switch in which each input port maintains a,separate queue for each output port to overcome the head-of-line (HOL) blocking of conventional FIFO input queuing switches is presented. Parallel Iterative Matching (PIM) is used as the scheduling algorithm for selecting the HOL cells to be transmitted in each time slot. After deriving a closed-form solution for the maximum throughput of the switch under saturated conditions, an analytical model for evaluating the switch performance under i.i.d Bernoulli traffic is developed using the tagged input queue approach. Performance measures including throughput, mean cell delay, and cell loss probability are computed from the analytical model. The accuracy of the an...
Mathematical cell delay modelling and performance comparison of four iterative scheduling algorithms...
Since the asynchronous transfer mode (ATM) has been strongly promoted as the transport structure for...
We consider an N×N non-blocking, space division ATM switch with input cell queueing. At each input, ...
An analytical model for the performance analysis of a novel input access scheme for an ATM switch is...
An analytical model for the performance analysis of a multiple input queued asynchronous transfer mo...
An analytical model for the performance analysis of a novel input access scheme for an ATM switch is...
Performance analysis of a cell scheduling algorithm for an input-queued ATM switch is presented in t...
In this letter, we analyze the performance of multiple input-queued asynchronous transfer mode (ATM)...
Performance analysis of ATM switches has been an active research topic in these recent years. Numero...
This letter quantitatively evaluates two alternative approaches to the scheduling of traffic streams...
Using two different packet scheduling policies, the maximum throughputs of an input-buffered ATM swi...
This Thesis looks into performance criteria such as cell loss probability, cell delay and delay jitt...
We evaluate the performance of an N × N ATM discrete time multicast switch model with input queueing...
In this paper we study a non-blocking ATM switch with internal speedup. Modifying the model in [1], ...
Considers an N×N nonblocking, space division, input queuing ATM cell switch, and a class of Markovia...
Mathematical cell delay modelling and performance comparison of four iterative scheduling algorithms...
Since the asynchronous transfer mode (ATM) has been strongly promoted as the transport structure for...
We consider an N×N non-blocking, space division ATM switch with input cell queueing. At each input, ...
An analytical model for the performance analysis of a novel input access scheme for an ATM switch is...
An analytical model for the performance analysis of a multiple input queued asynchronous transfer mo...
An analytical model for the performance analysis of a novel input access scheme for an ATM switch is...
Performance analysis of a cell scheduling algorithm for an input-queued ATM switch is presented in t...
In this letter, we analyze the performance of multiple input-queued asynchronous transfer mode (ATM)...
Performance analysis of ATM switches has been an active research topic in these recent years. Numero...
This letter quantitatively evaluates two alternative approaches to the scheduling of traffic streams...
Using two different packet scheduling policies, the maximum throughputs of an input-buffered ATM swi...
This Thesis looks into performance criteria such as cell loss probability, cell delay and delay jitt...
We evaluate the performance of an N × N ATM discrete time multicast switch model with input queueing...
In this paper we study a non-blocking ATM switch with internal speedup. Modifying the model in [1], ...
Considers an N×N nonblocking, space division, input queuing ATM cell switch, and a class of Markovia...
Mathematical cell delay modelling and performance comparison of four iterative scheduling algorithms...
Since the asynchronous transfer mode (ATM) has been strongly promoted as the transport structure for...
We consider an N×N non-blocking, space division ATM switch with input cell queueing. At each input, ...