The implementation of the Copper/Low-dielectric constants (Cu/low-k) technology at the wafer level brings new challenges to electronic packaging. The more fragile low-k layer has poorer adhesive strength on the copper traces on silicon die that requires a greater deal of care in performing die bonding and tightens underfill selection criteria. The chip bonding process might induce stress which is higher than any wafer level process on the low-k layer. Preventing warpage in order to avoid too much stress on the silicon die becomes one of most important criteria in the selection of underfill. A new failure mode on the Cu/low-k layer has to be handled. This urged a review on the applicability of the conventional failure analysis techniques use...
textChip-package interaction (CPI) has become a critical reliability issue for flip-chip packaging o...
[[abstract]]As is well known, the design parameters of the packaging material and structure greatly ...
Cu column bumping is a novel flip chip packaging technique that allows Cu columns to be bonded direc...
[[abstract]]Since today's trend is toward `green' products, manufacturers are moving toward lead-fre...
The continuing demand towards high-density and low profile integrated circuit packaging has accelera...
Miniaturization enforcement of electronic modules in complex as well as low end applications is the ...
[[abstract]]This research proposes a parametric analysis for a flip chip package with a constraint-l...
Mechanical integrity of low-k dielectrics continues to be an important focus for advanced semiconduc...
In the semiconductor industry, thermo-mechanical reliability has been a critical issue for both pac...
textThe electromigration (EM) and chip-package interaction (CPI) reliability of flip chip packages w...
The design and proper selection of low-cost printed circuit board (PCB) is essential to the reliabil...
[[abstract]]The material properties of underfill and substrate in flip chip package have temperature...
One major concern over thermally induced mechanical stress is that it causes reliability problems in...
The project will focus on the integration of the ultra low k materials into advanced silicon process...
This paper presents the assembly process using next generation electroformed stencils and Isotropic ...
textChip-package interaction (CPI) has become a critical reliability issue for flip-chip packaging o...
[[abstract]]As is well known, the design parameters of the packaging material and structure greatly ...
Cu column bumping is a novel flip chip packaging technique that allows Cu columns to be bonded direc...
[[abstract]]Since today's trend is toward `green' products, manufacturers are moving toward lead-fre...
The continuing demand towards high-density and low profile integrated circuit packaging has accelera...
Miniaturization enforcement of electronic modules in complex as well as low end applications is the ...
[[abstract]]This research proposes a parametric analysis for a flip chip package with a constraint-l...
Mechanical integrity of low-k dielectrics continues to be an important focus for advanced semiconduc...
In the semiconductor industry, thermo-mechanical reliability has been a critical issue for both pac...
textThe electromigration (EM) and chip-package interaction (CPI) reliability of flip chip packages w...
The design and proper selection of low-cost printed circuit board (PCB) is essential to the reliabil...
[[abstract]]The material properties of underfill and substrate in flip chip package have temperature...
One major concern over thermally induced mechanical stress is that it causes reliability problems in...
The project will focus on the integration of the ultra low k materials into advanced silicon process...
This paper presents the assembly process using next generation electroformed stencils and Isotropic ...
textChip-package interaction (CPI) has become a critical reliability issue for flip-chip packaging o...
[[abstract]]As is well known, the design parameters of the packaging material and structure greatly ...
Cu column bumping is a novel flip chip packaging technique that allows Cu columns to be bonded direc...