A truly-monolithic 900-MHz CMOS wireless receiver with on-chip RF and IF filters and a fully-integrated fractional-N synthesizer is presented. Implemented in standard 0.5-μm CMOS process and without any off-chip component, the receiver measures an image rejection of 79dB, sensitivity of -90dBm, IIP3 of -24dBm and NF of 22dB with power of 227mW and a chip area of 5.7mm<sup>2</sup>. The synthesizer achieves a phase noise of -118dBc/Hz at 600kHz offset and settling time of less than 150μs
Abstract — This paper describes a fundamentally flexible low power transceiver implemented in 90 nm...
The zero/low intermediate frequency (IF) receiver (RX) architecture has enabled full CMOS integratio...
A fully integrated RF front-end for W-CDMA applications including a low noise amplifier, a down conv...
This dissertation demonstrates a monolithic 900-MHz CMOS wireless transceiver. Single-conversion arc...
A new architecture for phase-locked loop frequency synthesizers which employs a switchable-capacitor...
M.Ing. (Electrical And Electronic Engineering)This dissertation presents a fully integrated image re...
Accompanying and enabling the explosion of information technology in the recent decades, RF CMOS des...
A digitally controlled RF front-end receiver is presented that employs Q-enhanced filtering of the R...
A 1.9GHz monolithic superheterodyne receiver front-end with 300MHz IF, on-chip tunable image reject ...
There is a strong demand for wireless communications in civilian and military applications, and spac...
A fractional-N frequency synthesizer fabricated in a0.13μm CMOS technology is presented for the a...
Abstract—A fully integrated CMOS low-IF Bluetooth receiver is presented. The receiver consists of a ...
A fully-integrated 950-MHz bandpass amplifier for use in a wireless receiver is designed in a standa...
A 1.9-GHz monolithic superheterodyne receiver front-end with 300-MHz IF on-chip tunable image-reject...
Recent developments in RF receiver design have eliminated all on-chip inductors except for that used...
Abstract — This paper describes a fundamentally flexible low power transceiver implemented in 90 nm...
The zero/low intermediate frequency (IF) receiver (RX) architecture has enabled full CMOS integratio...
A fully integrated RF front-end for W-CDMA applications including a low noise amplifier, a down conv...
This dissertation demonstrates a monolithic 900-MHz CMOS wireless transceiver. Single-conversion arc...
A new architecture for phase-locked loop frequency synthesizers which employs a switchable-capacitor...
M.Ing. (Electrical And Electronic Engineering)This dissertation presents a fully integrated image re...
Accompanying and enabling the explosion of information technology in the recent decades, RF CMOS des...
A digitally controlled RF front-end receiver is presented that employs Q-enhanced filtering of the R...
A 1.9GHz monolithic superheterodyne receiver front-end with 300MHz IF, on-chip tunable image reject ...
There is a strong demand for wireless communications in civilian and military applications, and spac...
A fractional-N frequency synthesizer fabricated in a0.13μm CMOS technology is presented for the a...
Abstract—A fully integrated CMOS low-IF Bluetooth receiver is presented. The receiver consists of a ...
A fully-integrated 950-MHz bandpass amplifier for use in a wireless receiver is designed in a standa...
A 1.9-GHz monolithic superheterodyne receiver front-end with 300-MHz IF on-chip tunable image-reject...
Recent developments in RF receiver design have eliminated all on-chip inductors except for that used...
Abstract — This paper describes a fundamentally flexible low power transceiver implemented in 90 nm...
The zero/low intermediate frequency (IF) receiver (RX) architecture has enabled full CMOS integratio...
A fully integrated RF front-end for W-CDMA applications including a low noise amplifier, a down conv...