An SOI LDMOS/CMOS/BJT technology for integrated power amplifiers used in wireless transceiver applications

This paper describes a SOI LDMOS/CMOS/BJT technology that can be used in portable wireless communication applications. This technology allows the complete integration of the front-end circuits with the baseband circuits for low-cost/low-power/high-volume single-chip transceiver implementation, The LDMOS transistors (0.35 mum channel length, 3.8 mum drift length, 4.5 GHz f(T) and 21 V breakdown voltage), CMOS transistors (1.5 mum channel length, 0.8/-1.2 V threshold voltage), lateral NPN transistor (18 V BTVCBO and h(FE) Of 20), and high Q-factor (up to 6.1 at 900 MHz and 7.2 at 1.8 GHz) on-chip inductors are fabricated, A fully-functional high performance integrated power amplifier for 900 MHz wireless transceiver application is also demonstrated