APPLICATION OF SELECTIVE EPITAXIAL SILICON AND CHEMOMECHANICAL POLISHING TO BIPOLAR-TRANSISTORS

Successful demonstration of single-polysilicon bipolar transistors fabricated using selective epitaxial growth (SEG) and chemo-mechanical polishing (CMP) is reported, The pedestal I structure made possible by the SEG/CMP process combination results in significantly reduced extrinsic-base collector capacitance. Cut-off frequency (f(T)) of devices with emitter stripe width of 1 mu m, a base width of 110 nm, and a peak base doping of 3 x 10(18) cm(-3) have been observed to improve from 16 GHz to 22 GHz when the extrinsic-base collector overlap is decreased from 1 mu m to 0.2 mu m, Leakage current; often a problem for SEG structures, has been reduced to 27 nA/cm(2) for the area component, and 10 pA/cm for the edge component, by (1) appropriate post-polish processing, including a high-temperature anneal and sacrificial oxidation, (2) aligning the device sidewalls along the (100) direction, and (3) the presence of the pedestal structure, Base-emitter junction nonideality in these transistors has also been investigated