In this paper, a novel folded gate LDMOS transistor (FG-LDMOST) structure is proposed with the properties of low on-resistance and high transconductance. The FG structure is formed by adding a single trench process into the conventional LDMOS process. In this way, the channel density can be largely increased after the additional process. From the data by laboratory measurement, with the FG concept applied, the specific on-resistance of FG-LDMOS device is reduced by 45.66\% compared to the conventional LDMOS structure with similar dimensions. At the same time, the transconductance value is improved by 64.09\%. The capacitance and effective channel mobility for both FG-LDMOST and the counterpart are also measured and compared. The significanc...
A novel SOI LDMOS (Lateral Double Diffused MOSfet) structure substituting the PN junction between ch...
In this paper, a novel 120V multiple RESURF lateral double-diffused MOS (LDMOS) transistor with shal...
In this paper, we propose a new hetero-material stepped gate (HSG) SOI LDMOS in which the gate is di...
IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)55-56PISD
In this paper, we report on the reduction of device resistance by up to 49% in junction isolated lat...
A concept for the integration of intermitted trench gates into silicon lateral double-diffused metal...
The-product of the on-resistance by the area of the high-voltage, LDMOS transistor can be reduced by...
The lateral double-diffused MOS (LDMOS) transistor has traditionally been a high-voltage device used...
A novel silicon RF lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSF...
A linearly graded doping drift region with step gate structure, used for improvement of reduced surf...
This paper aims to develop a low gate source voltage (Vgs) N-LDMOS element that is fully operational...
[[abstract]]This thesis presents a method to optimize integrated LDMOS transistors for use in on-res...
Abstract An ultra-low specific on-resistance (R on,sp) lateral double-diffused metal-oxide-semicondu...
In this paper, we propose a novel metal oxide semiconductor field effect transistor with L-shaped ch...
Abstract — In this letter, we proposed a new layout structure for RF laterally diffused metal-oxide-...
A novel SOI LDMOS (Lateral Double Diffused MOSfet) structure substituting the PN junction between ch...
In this paper, a novel 120V multiple RESURF lateral double-diffused MOS (LDMOS) transistor with shal...
In this paper, we propose a new hetero-material stepped gate (HSG) SOI LDMOS in which the gate is di...
IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)55-56PISD
In this paper, we report on the reduction of device resistance by up to 49% in junction isolated lat...
A concept for the integration of intermitted trench gates into silicon lateral double-diffused metal...
The-product of the on-resistance by the area of the high-voltage, LDMOS transistor can be reduced by...
The lateral double-diffused MOS (LDMOS) transistor has traditionally been a high-voltage device used...
A novel silicon RF lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSF...
A linearly graded doping drift region with step gate structure, used for improvement of reduced surf...
This paper aims to develop a low gate source voltage (Vgs) N-LDMOS element that is fully operational...
[[abstract]]This thesis presents a method to optimize integrated LDMOS transistors for use in on-res...
Abstract An ultra-low specific on-resistance (R on,sp) lateral double-diffused metal-oxide-semicondu...
In this paper, we propose a novel metal oxide semiconductor field effect transistor with L-shaped ch...
Abstract — In this letter, we proposed a new layout structure for RF laterally diffused metal-oxide-...
A novel SOI LDMOS (Lateral Double Diffused MOSfet) structure substituting the PN junction between ch...
In this paper, a novel 120V multiple RESURF lateral double-diffused MOS (LDMOS) transistor with shal...
In this paper, we propose a new hetero-material stepped gate (HSG) SOI LDMOS in which the gate is di...