Fabrication of double-gate metal oxide semiconductor field effect transistors (MOSFET) based on silicon on insulator technology (SOI) was performed using silicon wafers. A silicon film recrystallized from amorphous silicon was used for the fabrication. Results from device performance indicated that the film was equivalent to single crystal SOI film with high defect density
The Silicon-on-Insulator (SOI) technology allows the fabrication of devices with reduced parasitic c...
Metal-Induced-Lateral-Crystallization (MILC) followed by high temperature annealing has been used fo...
Currently, the established large area technology is amorphous silicon where device performance is sa...
A simple process to fabricate double gate SOI MOSFET is proposed. The new device structure utilizes ...
A double-gate silicon-on-insulator (SOI) MOSFET was fabricated using lateral solid phase epitaxy (LS...
Silicon-on-Insulator (SOI) MOSFETs were uniquely fabricated using the epitaxial lateral overgrowth (...
NMOS and PMOS Single-crystal-silicon-on-insulator (SOI) MOSFETs have been fabricated at RIT using a ...
This paper reports a process for the formation of very high quality single-crystal silicon films on ...
Large grain (> 10 um) poly-Si film has been formed from nickel Metal Induced Lateral Crystallization...
A new approach in double gate devices processing based on the wafer bonding of a thin SOI film on pr...
Polysilicon with large grain size of the order of several ten's of micron were obtained by combining...
In this paper, a novel method for the fabrication of planar double-gate (DG) MOS devices is presente...
A new approach in double gate devices processing based on the wafer bonding of a thin SOI film on pr...
In this paper, a novel method for the fabrication of planar double-gate (DG) MOS devices is presente...
In this paper, a novel method for the fabrication of planar double-gate (DG) MOS devices is presente...
The Silicon-on-Insulator (SOI) technology allows the fabrication of devices with reduced parasitic c...
Metal-Induced-Lateral-Crystallization (MILC) followed by high temperature annealing has been used fo...
Currently, the established large area technology is amorphous silicon where device performance is sa...
A simple process to fabricate double gate SOI MOSFET is proposed. The new device structure utilizes ...
A double-gate silicon-on-insulator (SOI) MOSFET was fabricated using lateral solid phase epitaxy (LS...
Silicon-on-Insulator (SOI) MOSFETs were uniquely fabricated using the epitaxial lateral overgrowth (...
NMOS and PMOS Single-crystal-silicon-on-insulator (SOI) MOSFETs have been fabricated at RIT using a ...
This paper reports a process for the formation of very high quality single-crystal silicon films on ...
Large grain (> 10 um) poly-Si film has been formed from nickel Metal Induced Lateral Crystallization...
A new approach in double gate devices processing based on the wafer bonding of a thin SOI film on pr...
Polysilicon with large grain size of the order of several ten's of micron were obtained by combining...
In this paper, a novel method for the fabrication of planar double-gate (DG) MOS devices is presente...
A new approach in double gate devices processing based on the wafer bonding of a thin SOI film on pr...
In this paper, a novel method for the fabrication of planar double-gate (DG) MOS devices is presente...
In this paper, a novel method for the fabrication of planar double-gate (DG) MOS devices is presente...
The Silicon-on-Insulator (SOI) technology allows the fabrication of devices with reduced parasitic c...
Metal-Induced-Lateral-Crystallization (MILC) followed by high temperature annealing has been used fo...
Currently, the established large area technology is amorphous silicon where device performance is sa...