3D packaging with through silicon via (TSV) for electrical and fluidic interconnections

In this paper a liquid cooling solution has been reported for 3-D package in PoP format. The high heat dissipating chip is mounted on a silicon carrier, which has copper through-silicon via for electrical interconnection and throughsilicon hollow via for fluidic circulation. Heat enhancement structures have been embedded in the chip carrier. Cooling liquid, de-ionized water is circulated through the chip carrier and heat from the chip is extracted. The fluidic channels are isolated from electrical traces using hermetic sealing. The research work has demonstrated 100 W of heat dissipation from one stack and total of 200 W from two stacks of the package. The fluidic interconnections and sealing techniques have been discussed. © 2009 IEEE