In modern VLSI design, extensive research has shown that automated analog layout generation is a nontrivial process in the analog and mixed-signal circuitry synthesis. The main contribution of this thesis is successful development of a method, which is able to handle complex multi-group symmetry, substrate sharing, and other topological constraints in the analog and mixed-signal layout placement design using transitive closure graph (TCG) representation. -- This thesis proposes a set of symmetric-feasible conditions, which can guarantee symmetric placement of sensitive cells with respect to one or multiple symmetry axes for reduction of parasitic mismatch and thermal gradients. A new contour-based packing scheme has been developed with the ...
Recently, the demand for analog and mixed-signal (AMS) integrated circuits (ICs) has increased signi...
Practical analog layout synthesis techniques have been the subject of active research for the past t...
This paper addresses the problem of device-level placement for analog layout. Dierent from most of t...
Recently several topological representations have been explored as alternatives to the conventional ...
In order to handle device matching for analog circuits, some pairs of modules need to be placed symm...
A new scheme is proposed to use transitive closure graph (TCG) to explore the full symmetry solution...
Due to complexity and susceptibility of analog layouts towards circuit performance, maturity state ...
An automatic placement system with emphasis on technology independent methodology and device matchin...
An automatic placement system with emphasis on technology independent methodology and device matchin...
In this paper, a layout synthesis tool for the design of analog integrated circuits (ICs) is present...
The integration of high-performance analog and digital circuits leads to an increasing need of new t...
Analog IC design is characterized by non-systematic re-design iterations, often requiring partial or...
New placement techniques are presented which substantially improve the process of automatic layout g...
The performance of analog circuits is critically dependent on layout parasitics, but the layout has ...
A methodology for the automatic synthesis of full-custom IC layout with analog constraints is presen...
Recently, the demand for analog and mixed-signal (AMS) integrated circuits (ICs) has increased signi...
Practical analog layout synthesis techniques have been the subject of active research for the past t...
This paper addresses the problem of device-level placement for analog layout. Dierent from most of t...
Recently several topological representations have been explored as alternatives to the conventional ...
In order to handle device matching for analog circuits, some pairs of modules need to be placed symm...
A new scheme is proposed to use transitive closure graph (TCG) to explore the full symmetry solution...
Due to complexity and susceptibility of analog layouts towards circuit performance, maturity state ...
An automatic placement system with emphasis on technology independent methodology and device matchin...
An automatic placement system with emphasis on technology independent methodology and device matchin...
In this paper, a layout synthesis tool for the design of analog integrated circuits (ICs) is present...
The integration of high-performance analog and digital circuits leads to an increasing need of new t...
Analog IC design is characterized by non-systematic re-design iterations, often requiring partial or...
New placement techniques are presented which substantially improve the process of automatic layout g...
The performance of analog circuits is critically dependent on layout parasitics, but the layout has ...
A methodology for the automatic synthesis of full-custom IC layout with analog constraints is presen...
Recently, the demand for analog and mixed-signal (AMS) integrated circuits (ICs) has increased signi...
Practical analog layout synthesis techniques have been the subject of active research for the past t...
This paper addresses the problem of device-level placement for analog layout. Dierent from most of t...