Add to ORKGIn this paper, design of a real-time video frame differentiator based on an external memory interface is proposed. Furthermore, implementation and simulation processes of the design is discussed. The proposed design is capable of differentiating video frames over time, up to full-HD resolution at 60 Hz frame rate. An external SDRAM memory unit is used within the proposed design and drived by a memory interface. In order to improve the flexibility of the architecture, video resolution, video buffer size on memory and burst size of the memory interface are designed to be user defined and configurable.Publisher's Versio
This work presents a domain-specific memory subsystem based on a two-level memory hierarchy. It targ...
A high-fidelity video digitizer/processor extracts spatial and gray-scale information from high reso...
Abstract—This paper proposes a combined frame memory architecture which is smaller in size and is po...
This paper presents a concept for an SDRAM controller targeting video processing platforms with dyna...
Video framebuffers are usually used in video processing systems to store an entire frame of video da...
Abstract: In this paper we present a new architecture of video memory data handling in microprocesso...
In this thesis, the author describes a propositional design for a DDR3 memory interface, for an exis...
In this thesis, both a method and a tool to enable efficient memory synthesis for real-time video pr...
The thesis, entitled PC-BASED VIDEO FRAME GRABBER aims to capture one frame of a video image, and th...
This paper presents a tool for automatic generation of the memory management implementation for spat...
The architecture of the present video processing units in consumer systems is usually based on vario...
The 90 degree rotation is important for the geometrical transformation of the video image. This pape...
A study of the MPEG-2 video decoding standard in Main Profile @ Main Level has been performed, compa...
Video processing usually requires one to read in an entire image into a framebuffer, usually taking ...
Research has been undertaken into domain-specific reconfigurable architectures for future System-on-...
This work presents a domain-specific memory subsystem based on a two-level memory hierarchy. It targ...
A high-fidelity video digitizer/processor extracts spatial and gray-scale information from high reso...
Abstract—This paper proposes a combined frame memory architecture which is smaller in size and is po...
This paper presents a concept for an SDRAM controller targeting video processing platforms with dyna...
Video framebuffers are usually used in video processing systems to store an entire frame of video da...
Abstract: In this paper we present a new architecture of video memory data handling in microprocesso...
In this thesis, the author describes a propositional design for a DDR3 memory interface, for an exis...
In this thesis, both a method and a tool to enable efficient memory synthesis for real-time video pr...
The thesis, entitled PC-BASED VIDEO FRAME GRABBER aims to capture one frame of a video image, and th...
This paper presents a tool for automatic generation of the memory management implementation for spat...
The architecture of the present video processing units in consumer systems is usually based on vario...
The 90 degree rotation is important for the geometrical transformation of the video image. This pape...
A study of the MPEG-2 video decoding standard in Main Profile @ Main Level has been performed, compa...
Video processing usually requires one to read in an entire image into a framebuffer, usually taking ...
Research has been undertaken into domain-specific reconfigurable architectures for future System-on-...
This work presents a domain-specific memory subsystem based on a two-level memory hierarchy. It targ...
A high-fidelity video digitizer/processor extracts spatial and gray-scale information from high reso...
Abstract—This paper proposes a combined frame memory architecture which is smaller in size and is po...