Design of Microwave Low-noise Amplifier and Voltage-controlled Oscillator

[[abstract]]本論文共設計了一個低雜訊放大器及壓控振盪器線路設計，以900MHZ低雜訊放大器設計為主要架構，這具有改善消秏功率的CS組態，ADS模擬結果顯示了其具有大於16 199dB的功率增益，雜訊指數為最大增益16 285dB、最小雜訊0 757dB、在2 5V的供應電壓下，其消秏功率為22mW。 另在壓控振盪器線路設計方式則希望以達到低電壓操作、低相位雜訊、較大頻率調整範圍、減小面積並同時達到低功率損耗為設計目標，以1 8GHz單頻設計為主要架構，主頻在1MHz時為120dBc/Hz，然而在元件方面低雜訊放大器及壓控振盪器將採用安捷倫(Keysight)科技公司計設所開發 ADS(Advanced Design System)模擬系統來設計電路並完成電路製作，量測結果顯示，可調電壓為0~10V，操作頻率範圍為1 17GHz~1 89GHz，相位雜訊為-120dBc/Hz@100kHz。 關鍵字: 低雜訊放大器、壓控振盪器、相位雜訊[[abstract]]For this thesis we designed an LNA and VCO circuit with a 900Mhz low noise amplifier as the main structure there by a nowing the cs configuration to have improved power efficiencu The simulation results show that the power gain is More than 16 199db the nosise figure is has a MAXmum capaoty of 16 285db with a minimum noise frequency of 0 757 and the power consumption is 22mw at a 2 5v power supply We designed a VCO with low-phase noise wide tuning range small chip size and low power consumption with a 1 8Ghz single fvequency design as the main structure At first these VCO circuits were devel oped by the Advanced Design System (ADS) For the current reused QVCO the measurement tuning voltage range is 0~10V The tuning frequency range is 1 17GHZ~1 89GHZ with the relative phase noise at -120 dBc/Hz at 100 kHz offset frequency Keywords: LNA VCO phase nois