A Low-Cost CMOS Time-Domain Smart Temperature Sensor

[[abstract]]傳統的電壓域溫度感測器，一般都是以雙載子電路來做溫度感測，及依靠ADC(類比至數位轉換器)做數位輸出轉換，如此將會造成晶片面積上升以及更高的功率消耗。而時域型智慧型溫度感測器即被提出以適用於SOC 或是VLSI積體化整合。 本研究主要貢獻在於提出循環式架構以取代先前之線性架構，解決了位元數上升，面積亦隨之增加之困擾；其所採用之由CMOS NAND2 組成的循環式溫敏延遲線，可將溫度(類比訊號)轉成相對應之時間延遲訊號，而具溫度補償之低溫敏循環式參考時間延遲線所造成之時間延遲訊號則與數位值有關而與溫度低度相關，最後搭配連續逼近暫存器(SAR)，透過時間比較器比較溫敏及低溫敏的延遲時間，隨著循環式溫敏延遲線的變化，由連續逼近暫存器使低溫敏循環式參考時間延遲線適當的調整，來決定對應該待測溫度之數位值。該晶片由TSMC 2P4M 0.35um製程所生產，核心面積只有0.5m*0.5m。溫度範圍為0°C～90°C，在一次線性回歸後的模擬誤差只有±0.6°C，由於採用11 Bits的SAR，其溫度的有效解析度為0.05°C。功率消耗僅為50uW，非常適合統整於VLSI或SOC晶片。[[abstract]]Conventional voltage-domain smart temperature sensors usually utilize BJT-based circuits for the temperature sensing, and rely on ADCs for digital output conversion, which occupy large chip areas and have higher power consumptions. Therefore, the time-domain sensors are proposed to be applicable for SOC or VLSI integration. To achieve the goals of low-cost and low-power in the portable systems, a temperature dependent delay time circuit, which composed of a cyclic delay line with CMOS NAND rather than the linear delay line, is utilized to generate a delay time proportional to the measured temperature. A novel adjustable reference delay time circuit with temperature-compensation is designed to produce the low temperature-sensitive delay time proportional to the digital control code. As a result, the temperature resolution can be increased without much increase in chip area. A SAR (successive approximation register) control logic is adopted for selecting the optimal reference delay time by time comparator for digital output coding. The core area is 0.5m*0.5m only in a TSMC standard 0.35-μm 2P4M CMOS process. For the first-order linear regression analysis, the achieved error is within ± 0.6°C in the temperature range of 0°C~90°C. The effective resolution is about 0.05°C with an 11bits SAR. The power consumption is 50uW, which is very suitable for integrating with VLSI or SOC chips