In this paper, a wideband (3-13 GHz) 7-bit digitally controlled attenuator designed with isolated NMOS is proposed. Flat attenuation states are generated by employing parallel capacitor for Pi type attenuation bits to compensate for the attenuation degradation in high frequencies for high attenuation bits. Also using isolated NMOS eliminates the internal parasitic capacitance effects of regular NMOS. The attenuator is designed in IHP 0.13um SiGe BiCMOS technology. The simulated RMS amplitude error is less than 0.17 dB and RMS phase error less than 2.8° over the whole frequency band. The precision of the attenuator is 0.25 dB whereas the attenuation range is 31.75 dB. The simulated insertion loss at the minimum attenuation level is -6.6 dB. ...
Variable attenuator circuits are essential system blocks in millimetre wave radio links. Two novel v...
Digital Step attenuators are used in many communication systems to regulate the signal level to achi...
This letter presents an improved circuit topology to minimize the number of external control voltage...
This paper presents a step variable attenuator with 0.22 dB flat attenuation states and low phase va...
This letter presents a 7-bit CMOS step attenuator for the first time in the literature, designed wit...
This paper presents a 6-bit step attenuator with high linearity and very low RMS amplitude and phase...
This paper presents the design and measuring of a 6-bit SiGe BiCMOS digital step attenuator, with a ...
In this brief, the analysis, design, and measured results of a fully integrated 7-bit step attenuato...
A low insertion loss, wideband 6-bit digital step attenuator is implemented in the 0.25-μm GaAs pHEM...
We present a novel digital step attenuator (DSA) with low phase variation under attenuation state an...
A highly linear P attenuator system using a wideband IM3 cancellation technique is presented that pr...
This paper proposes a C/X/Ku/K band 6-bit digital step attenuator (DSA) which employs a variety of i...
This paper mainly introduces the Wideband 5-bit MMIC digital attenuator with high precision. Firstly...
A wideband IM3 cancellation technique for CMOS attenuators is presented. With proper transistor widt...
In this paper, a 4-bit digital step attenuator using 0.25 μm GaN HEMT technology for wideband radar ...
Variable attenuator circuits are essential system blocks in millimetre wave radio links. Two novel v...
Digital Step attenuators are used in many communication systems to regulate the signal level to achi...
This letter presents an improved circuit topology to minimize the number of external control voltage...
This paper presents a step variable attenuator with 0.22 dB flat attenuation states and low phase va...
This letter presents a 7-bit CMOS step attenuator for the first time in the literature, designed wit...
This paper presents a 6-bit step attenuator with high linearity and very low RMS amplitude and phase...
This paper presents the design and measuring of a 6-bit SiGe BiCMOS digital step attenuator, with a ...
In this brief, the analysis, design, and measured results of a fully integrated 7-bit step attenuato...
A low insertion loss, wideband 6-bit digital step attenuator is implemented in the 0.25-μm GaAs pHEM...
We present a novel digital step attenuator (DSA) with low phase variation under attenuation state an...
A highly linear P attenuator system using a wideband IM3 cancellation technique is presented that pr...
This paper proposes a C/X/Ku/K band 6-bit digital step attenuator (DSA) which employs a variety of i...
This paper mainly introduces the Wideband 5-bit MMIC digital attenuator with high precision. Firstly...
A wideband IM3 cancellation technique for CMOS attenuators is presented. With proper transistor widt...
In this paper, a 4-bit digital step attenuator using 0.25 μm GaN HEMT technology for wideband radar ...
Variable attenuator circuits are essential system blocks in millimetre wave radio links. Two novel v...
Digital Step attenuators are used in many communication systems to regulate the signal level to achi...
This letter presents an improved circuit topology to minimize the number of external control voltage...