Micro-G silicon accelerometers with high performance CMOS interface circuitry.

High precision micro-g accelerometers are widely used in applications such as inertial navigation, microgravity measurements and seismology. The objective of this dissertation is to design and develop a z-axis micro-g accelerometer with high sensitivity, low noise, low temperature sensitivity, and good long-term stability. In order to achieve this goal, two novel all-silicon device structures, two single-wafer fabrication processes, and a novel interface CMOS circuit are introduced. The accelerometers are fabricated on a single silicon wafer using a combined bulk and surface micromachining technology. The first accelerometer is a fully-symmetrical capacitive device, which has a low cross-axis sensitivity in addition to the aforementioned performance targets. The accelerometer with a 4 x 1mm 2 proof mass shows a measured sensitivity of 19.4pF/g using turn-over tests, that yields a differential top and bottom sensitivity of 38.8pF/g. The calculated noise floor of this device at atmosphere is 0. 16 mug/√Hz. The second accelerometer is a high sensitivity capacitive device with a new folded-electrode structure. The structure provides closed-loop operation and differential capacitance measurement with a single-sided structure. The measured sensitivity for a device with 2.6 x 1mm2 proof mass is about 100pF/g. The calculated mechanical noise floor for the same device is 0.18mug/√Hz at atmosphere. Thorough analytical modeling and simulation of the accelerometer with finite electrode stiffness operated closed-loop are presented with an oversampled sigma-delta modulator chip. The simulations are performed in the time domain with inclusion of all non-idealities and non-linearities. The simulation results show a resolution of less than 10mug direct digital output and better than 1% linearity. Finally, a high performance interface circuit for the micro-g accelerometers is presented. This chip implements an oversampled sigma-delta modulator and can be both used for open-loop analog readout, and closed-loop control and readout with direct digital output. The chip has a large dynamic range, low offset and good dc response despite large input base and parasitic capacitances. This switched-capacitor circuit has 370muV input referred offset and better than 75aF input capacitance resolution with a 200kHz sampling clock. Also, this chip includes start-up circuit and PWM digital lead compensator for closed-loop control of the accelerometer with a single 5V supply over a +/-1.2g range.Ph.D.Applied SciencesElectrical engineeringMaterials scienceUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/131824/2/9929985.pd