Design and implementation of reliable main memory.

One of the fundamental limits to high-performance, high-reliability applications is memory's vulnerability to system crashes. Because memory is commonly viewed as unsafe, applications requiring high reliability need to write data synchronously back to disk. This extra disk traffic lowers performance and necessitates complex strategies to minimize the impact of disk I/O. The goal of the Rio (RAM I/O) project is to make ordinary main memory safe for persistent storage by enabling memory to survive system crashes. Reliable memory enables a system to achieve the best of both worlds: reliability equivalent to a write-through file cache, where every write is instantly safe, and performance equivalent to a pure write-back cache, with no reliability-induced writes to disk. We apply an iterative design methodology to design systematically reliable main memories, and use it to design and implement reliable main memories in different platforms (Intel PC and Digital Alpha workstation) and application domains (operating system and databases). Our main design techniques are to protect memory during a crash and restore it either during a crash (a safe sync) or during a reboot (a warm reboot). We conduct extensive crash tests to demonstrate that our ideas are sound, and to formulate the design principles for reliable main memory.PhDApplied SciencesComputer scienceElectrical engineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/132213/2/9959831.pd