This research develops a method for relocating reconfigurable modules on the Virtex-II (Pro) family of Field Programmable Gate Arrays (FPGAs). A bitstream translation program is developed which correctly changes the location of a partial bitstream that implements a module on the FPGA. To take advantage of relocatable modules, three fault-tolerance circuit designs are developed and tested. This circuit can operate through a fault by efficiently removing the faulty module and replacing it with a relocated module without faults. The FPGA can recover from faults at a known location, without the need for external intervention using an embedded fault recovery system. The recovery system uses an internal PowerPC to relocate the modules and reprogr...
Field Programmable Gate Arrays (FPGAs) are reconfigurable hardware components that have found great ...
Emerging reconfiguration techniques that include partial dynamic reconfiguration and partial bitstre...
This paper presents a novel approach to exploit FPGA dynamic partial reconfiguration to improve the ...
This paper presents a new approach to on-line fault tolerance via reconfiguration for the systems ma...
Advances in semiconductor technology using smaller sizes of transistors in order to fit more of them...
Abstract: Redundancy based hardening techniques are applied at the pre-synthesis or synthesis level....
In recent years the application space of reconfigurable devices has grown to include many platforms ...
A method of fault tolerant reconfiguration and operation of a field programmable gate array (FPGA) d...
Nowadays Field-Programmable Gate Arrays (FP-GAs) are increasingly used in critical applications. In ...
This research implements a circuit reconfiguration system (CRS) to reconfigure a field programmable ...
International audienceReliability and other uncertainty issues are serious problems for Field Progra...
International audienceDynamic and partial reconfiguration of Field Programmable Gate Arrays (FPGA) e...
Partial reconfiguration is a technique used to increase the flexibility of an FPGA-based system by r...
Failures of nano-metric technologies owing to defects and shrinking process tolerances give rise to ...
The research described in this paper shows how the runtime relocation of a reconfigurable component ...
Field Programmable Gate Arrays (FPGAs) are reconfigurable hardware components that have found great ...
Emerging reconfiguration techniques that include partial dynamic reconfiguration and partial bitstre...
This paper presents a novel approach to exploit FPGA dynamic partial reconfiguration to improve the ...
This paper presents a new approach to on-line fault tolerance via reconfiguration for the systems ma...
Advances in semiconductor technology using smaller sizes of transistors in order to fit more of them...
Abstract: Redundancy based hardening techniques are applied at the pre-synthesis or synthesis level....
In recent years the application space of reconfigurable devices has grown to include many platforms ...
A method of fault tolerant reconfiguration and operation of a field programmable gate array (FPGA) d...
Nowadays Field-Programmable Gate Arrays (FP-GAs) are increasingly used in critical applications. In ...
This research implements a circuit reconfiguration system (CRS) to reconfigure a field programmable ...
International audienceReliability and other uncertainty issues are serious problems for Field Progra...
International audienceDynamic and partial reconfiguration of Field Programmable Gate Arrays (FPGA) e...
Partial reconfiguration is a technique used to increase the flexibility of an FPGA-based system by r...
Failures of nano-metric technologies owing to defects and shrinking process tolerances give rise to ...
The research described in this paper shows how the runtime relocation of a reconfigurable component ...
Field Programmable Gate Arrays (FPGAs) are reconfigurable hardware components that have found great ...
Emerging reconfiguration techniques that include partial dynamic reconfiguration and partial bitstre...
This paper presents a novel approach to exploit FPGA dynamic partial reconfiguration to improve the ...