Disclosed herein is a cache coherence protocol for a distributed cache and a distributed strongly-consistent database in which an improved mechanism is provided for determining the validity of cached profile values and determining whether to update cached profile values. The mechanism can store profile values in a cluster. The mechanism can read a profile value from the cluster and store the profile value in a cache in connection with a read timestamp and a staleness value. The mechanism can detect an event for which the profile value is to be used. The mechanism can then determine, based on the read timestamp and the staleness value, whether the profile value stored in the cache is valid. The mechanism can use the profile value stored in t...
An adaptive cache coherence mechanism exploits semantic information about the expected or observed a...
An adaptive cache coherence mechanism exploits semantic information about the expected or observed a...
We propose a twophase ImperativeDirective design methodology for designing cache coherence protocols...
Submitted to the University of London for the Degree of Doctor of Philosophy in Computer Scienc
In this paper, we describe Teapot, a domain-specific language for writing cache coherence protocols....
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cac...
Cache coherence is one of the main challenges to tackle when designing a shared-memory multiprocesso...
A number of different systems (multiprocessor systems, distributed systems, and nowadays Internet) r...
Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer ...
With web caching and cache-related services like CDNs and edge services playing an increasingly sign...
Abstract. We propose an adaptive cache coherence-replacement scheme for distributed systems that is ...
Cache coherence protocols play an important role in the performance of distributed and centralized s...
In one embodiment, a cache comprises a cache memory and a cache control circuit coupled to the cache...
This thesis presents a new cache coherence protocol for shared bus multicache systems, and addresses...
[[abstract]]A cache coherence protocol for a multiprocessor system. Each processor in the system has...
An adaptive cache coherence mechanism exploits semantic information about the expected or observed a...
An adaptive cache coherence mechanism exploits semantic information about the expected or observed a...
We propose a twophase ImperativeDirective design methodology for designing cache coherence protocols...
Submitted to the University of London for the Degree of Doctor of Philosophy in Computer Scienc
In this paper, we describe Teapot, a domain-specific language for writing cache coherence protocols....
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cac...
Cache coherence is one of the main challenges to tackle when designing a shared-memory multiprocesso...
A number of different systems (multiprocessor systems, distributed systems, and nowadays Internet) r...
Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer ...
With web caching and cache-related services like CDNs and edge services playing an increasingly sign...
Abstract. We propose an adaptive cache coherence-replacement scheme for distributed systems that is ...
Cache coherence protocols play an important role in the performance of distributed and centralized s...
In one embodiment, a cache comprises a cache memory and a cache control circuit coupled to the cache...
This thesis presents a new cache coherence protocol for shared bus multicache systems, and addresses...
[[abstract]]A cache coherence protocol for a multiprocessor system. Each processor in the system has...
An adaptive cache coherence mechanism exploits semantic information about the expected or observed a...
An adaptive cache coherence mechanism exploits semantic information about the expected or observed a...
We propose a twophase ImperativeDirective design methodology for designing cache coherence protocols...