High speed and low power silicon-based receiver front-end for optical interconnect

Chen, Shen-Wen
Chiu, Po-Wei
Li, Yan-Feng
Hsu, Shawn S.H.
Li, K.
Thomson, D.J.
Reed, G.T.

Publication date

January 2016

DOI

10.1109/GROUP4.2016.7739088

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Abstract

We demonstrate an optical receiver front-end using a CMOS TIA with a germanium-on-silicon PD. The amplifier only occupies 0.09 mm 2 with 12 mW power consumption, and achieves a 27.5 GHz 3-dB bandwidth. The integrated silicon-based receiver shows well opened eye diagrams up to 20 Gb/s

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High speed and low power silicon-based receiver front-end for optical interconnect

Abstract

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High speed and low power silicon-based receiver front-end for optical interconnect

Abstract

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