This review summarises the recent advances in the field of silicon nanowire electronics from bottom-up assembled materials. The aim is to draw a comparison between bottom-up and top-down approaches, examining respective achievements and evaluating advantages and disadvantages of each methodology. Existing techniques for synthesis and doping are discussed to provide the framework in which practical electronic applications can be developed. Next, key device categories are reviewed, emphasising current challenges and proposed solutions. Finally, field perspectives are outlined. © 2012 Elsevier Ltd
chap 2International audienceThis chapter summarizes the major challenges encountered in the fabricat...
Electron beam lithography, low-damage dry etch and thermal oxidation have been used to pattern Si n...
Cette thèse porte sur l'étude de nanofils silicium réalisés par approche top-down. Elle s'inscrit da...
International audienceThis paper summarizes some of the essential aspects for the fabrication of fun...
This paper presents a brief review of our recent work investigating a novel bottom-up approach to re...
Semiconductor nanowires have been the subject of intensive research investment over the past few dec...
The catalytic growth of semiconductor nanowires offers the possibility of achieving otherwise unfeas...
One dimensional nanoscale materials, such as nanowires (NW)1 and carbon nanotubes (CNT)2, are attrac...
Silicon nanowire (SiNW) has drawn great research attention in recent years due to its high aspect ra...
During the last half century, a dramatic downscaling of electronics has taken place, a miniaturizati...
Abstract in Undetermined Extreme down-scaling of nanoelectronic devices by top-down fabrication meth...
The process for the fabrication of devices based on a single silicon nanowire with a triangular sect...
International audienceOwing to their physical and electrical properties, silicon nanowires (SiNWs) r...
The development of semiconductor nanowires has recently been the focus of extensive research as thes...
chap 2International audienceThis chapter summarizes the major challenges encountered in the fabricat...
Electron beam lithography, low-damage dry etch and thermal oxidation have been used to pattern Si n...
Cette thèse porte sur l'étude de nanofils silicium réalisés par approche top-down. Elle s'inscrit da...
International audienceThis paper summarizes some of the essential aspects for the fabrication of fun...
This paper presents a brief review of our recent work investigating a novel bottom-up approach to re...
Semiconductor nanowires have been the subject of intensive research investment over the past few dec...
The catalytic growth of semiconductor nanowires offers the possibility of achieving otherwise unfeas...
One dimensional nanoscale materials, such as nanowires (NW)1 and carbon nanotubes (CNT)2, are attrac...
Silicon nanowire (SiNW) has drawn great research attention in recent years due to its high aspect ra...
During the last half century, a dramatic downscaling of electronics has taken place, a miniaturizati...
Abstract in Undetermined Extreme down-scaling of nanoelectronic devices by top-down fabrication meth...
The process for the fabrication of devices based on a single silicon nanowire with a triangular sect...
International audienceOwing to their physical and electrical properties, silicon nanowires (SiNWs) r...
The development of semiconductor nanowires has recently been the focus of extensive research as thes...
chap 2International audienceThis chapter summarizes the major challenges encountered in the fabricat...
Electron beam lithography, low-damage dry etch and thermal oxidation have been used to pattern Si n...
Cette thèse porte sur l'étude de nanofils silicium réalisés par approche top-down. Elle s'inscrit da...