SAMPA chip: the new 32 channels ASIC for the ALICE TPC and MCH upgrades
- Adolfsson, J.
- Pabon, A. A.
- Bregant, M.
- Britton, C.
- Brulin, G.
- Carvalho, D.
- Chambert, V.
- Chinellato, D.
- Espagnon, B.
- Herrera, H. D. H.
- Ljubicic, T.
- Mahmood, S. M.
- Mjornmark, U.
- Moraes, D.
- Munhoz, M. G.
- Noel, G.
- Oskarsson, A.
- Osterman, L.
- Pilyar, A.
- Read, K.
- Ruette, A.
- Russo, P.
- Sanches, B. C. S.
- Severo, L.
- Silvermyr, D.
- Suire, C.
- Tambave, G. J.
- Tun-Lanoe, K. M. M.
- van Noije, W.
- Velure, A.
- Vereschagin, S.
- Wanlin, E.
- Weber, T. O.
- Zaporozhets, S.
DOIAbstract
FUNDAÇÃO DE AMPARO À PESQUISA DO ESTADO DE SÃO PAULO - FAPESPCONSELHO NACIONAL DE DESENVOLVIMENTO CIENTÍFICO E TECNOLÓGICO - CNPQThis paper presents the test results of the second prototype of SAMPA, the ASIC designed for the upgrade of read-out front end electronics of the ALICE Time Projection Chamber (TPC) and Muon Chamber (MCH). SAMPA is made in a 130 nm CMOS technology with 1.25V nominal voltage supply and provides 32 channels, with selectable input polarity, and three possible combinations of shaping time and sensitivity. Each channel consists of a Charge Sensitive Amplifier, a semi-Gaussian shaper and a 10-bit ADC; a Digital Signal Processor provides digital filtering and compression capability. In the second prototype run both full ...
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