Improving Hardware Design Reuse through Design-space Exploration

The continued demand for higher performance and more energy efficient systems has fueled interest in specialized hardware. However, the design of such systems has large non-recurring engineering costs. Thus, the reuse of digital hardware components, especially parameterizable hardware generators, has become a prominent method of continuing productive design of new systems. Challenges in dealing with an increasing amount of design reuse are determining how to select the correct set of generators to use for a design as well as how to parameterize them. The mapping of parameters to desired properties such as performance, area and power is not always clear. Further, obtaining the exact values for these properties involves long-running tool flows. The goals of the research in this thesis are to to improve design reuse by facilitating and speeding up this design space exploration task. To improve the speed of optimization of hardware designs, we study improvements to a model-based optimization method. Specifically, we examine how the underlying model used for optimization can be improved by prior design knowledge and information available in the FPGA design tool flow. First, we find that information about the relationships between parameters can be integrated into the model to reduce optimization time. Second, we demonstrate that informative and fast estimates are available in the High-Level Synthesis tool flow and incorporating these values leads to further improvements in optimization speed. Finally, we show how integrating hierarchical information about area, delay and latency can also reduce optimize time. Through these studies, we demonstrate how carefully adding design information into the model-based optimization process is an effective means of accelerating design-space exploration. In addition to improving optimization speed, we consider more briefly how to enumerate design spaces for systems of hardware generators. We find that a constraint-based interface for hardware generators is effective for design-space exploration in our case studies. Finally, we derive methods of bounding search heuristics used within the optimization scheme. As design reuse and complexity continues to increase, we hope that the methods proposed in this thesis will aid in the design of the next generation of digital systems.Ph.D