The design, implementation and application of a class of artificial neural network

Re-awaking in the 1980s from a rather chequered history Artificial Neural Networks (ANNs) have sustained an intense interest from a wide range of research disciplines. The first chapter of this thesis provides an explanation of the concepts and motivation behind such a research effort, and traces the history of ANNs from their origins in the early 1940s up to the present day. In an attempt to emulate cognitive function various abstract mathematical representations of neurobiological features and functions have resulted in numerous ANN models. However, no ANN yet developed represents a panacea, in that each has its own limitations. The attributes and limitations of some ANNs are discussed in chapter 2, where within the framework of this chapter, we report our development of a Binary Associative Memory NETwork (BAMNET) ANN, which exhibits the optimum memory capacity for this class of ANN and incorporates the additional features of: direct access to previously stored memories; a null response; and a stepwise search for low orders of correlation. Furthermore the BAMNET ANN uses a building block architecture which may be useful in the realisation of other classes of ANN. The effectiveness of any ANN model in the execution of a cognitive task in real time is strongly dependent on the hardware technology used to implement it. From the wide spectrum of technologies proposed for the implementation of ANNs reviewed in chapter 3, analogue VLSI architectures based on well established CMOS technology appear attractive. Using such an approach it is possible to capture the inherent parallelism in an ANN model, by packing a large number of processing elements and interconnects on a single chip. This in turn enables the ANN realisation to rapidly process the large amount of data involved in cognitive tasks. The BAMNET ANN model was conceived for implementation in current mode analogue VLSI circuitry, where chapters 4 and 5 describe the respective design and experimental verification of a BAMNET ANN prototype which was fabricated in a 2.4 µm CMOS technology. Both the potential implications of the successful performance of this prototype and the possible limitations are identified. Finally chapter 6 proposes a novel application for the BAMNET ANN implementation, as an ideal correlation decoder in a telecommunications system