Impedance and parasitic capacitance analysis of SiC MOSFETs

Power electronic systems have benefited tremendously in power discrete devices in the past ten years. In the year 1970s, MOSFETs, which are known as Metal–Oxide–Semiconductor Field-Effect Transistors, as well as Insulated Gate Bipolar Transistors (IGBTs) in the 1980s, significantly allowed designs of compact high-efficiency systems, mainly due to the tremendously improved power gain. [1] Both power MOSFETs and IGBTs are reaching their theoretical limits and suffer from energy losses, prompting the need for some new technologies, namely Gallium-Nitride (GaN) and Silicon-Carbide (SiC) power semiconductors. Both GaN and SiC are wide bandgap technologies, which means they provide faster switching speeds and higher breakdown voltages than IGBTs and power MOSFETs. Since MOSFETs’ demands have been increasing for high switching applications, there is a need to analyze the ageing as well as the degradation, in order to protect and at the same time prolong the lifetime of MOSFETs. This focuses on the condition monitoring of the MOSFETs, which includes implementation and testing of MOSFETs, experimental work is carried out on degradation of MOSFETs using active power cycling and thermal power cycling method. The in-built machine is set up to degrade the MOSFETs through power cycling, which is known as ‘Accelerated Ageing Test Cycles’. MOSFETs characteristics such as on-state resistance, diode forward resistance, power losses are measured and compared for both new and degraded MOSFETs. Different model of MOSFETs are also being used to get the measurement of losses. This condition monitor of MOSFETs can be used for further experiments and study to make a comparison with other switching devices such as IGBT and BJT of their lifetime characteristics. [2]Bachelor of Engineering (Electrical and Electronic Engineering