Design of Low Power VCO using >2G Hz Technology

The design challenges are increasing with the increase in demand for low power, high-frequency wireless systems. The reasons are poor phase noise performance of integrated VCO and large area taken by the loop filter. Many recent reporting show that with careful design, on-chip VCO can be made to give comparable phase noise performance with off-chip VCO. In this paper we have presented a design of a ring oscillator which is implemented in CMOS