Performance modeling of parallel processor-memory interconnection networks

General analytic models for the performance analysis of various unique and redundant path circuit-switched processor-memory interconnection networks are presented. These networks include crossbar, unique path banyan, d-dilated and r-replicated banyan, gamma, and IADM networks. By simply defining an explicit term in the specified models, a given type of memory request pattern may be taken into account. These analytical models are also extended to analyze nonhierarchical and hierarchical cluster based versions of crossbar and banyan networks. Memory request patterns employed to illustrate the usage of the various models include random, permutation, preferred; and hot-spot memory request patterns. The preferred memory requesting model presented in this thesis is shown to be a more general memory requesting model where both the random as well as the permutation request patterns are special cases of it. In addition, analytical results presented in this dissertation have been validated against simulation results. These results are also used to compare and contrast the indicated networks with respect to the network bandwidth and cost-effectiveness