This paper presents a study upon implementation of a nonvolatile memory with a standard CMOS process. The main emphasis is to obtain an analog, continuous value, EEPROM module. The accuracy, reliability and reproducibility performance of the different memory cells have been investigated. Different types of programming method have been tested and compared EEPROM cells have been processed with two different 0.35 μm CMOS processes and two different process runs. Measurement results show that a reliable, medium accuracy, analog EEPROM can be implemented without any process Modifications
A single-poly electrically erasable programmable ROM (EEPROM) cell compatible with standard CMOS pro...
In this paper, a thorough characterization of phase-change memory (PCM) cells was carried out, aimed...
A 128-pixel complementary metal-oxide-semiconductor (CMOS) image sensor array with analog nonvolatil...
A new single-poly-EEPROM cell compatible with standard CMOS processes is proposed. A pMOS tunneling ...
A floating capacitor with a MOS charge injector structure can be used as a nonvolatile memory. This ...
[[abstract]]A novel multilevel/analog electrically erasable programmable read only memory (EEPROM) c...
[[abstract]]A novel EEPROM memory cell with new program and erase operations fabricated by standard ...
[[abstract]]An analogue nonvolatile memory is presented, which is not only CMOS-compatible but also ...
A novel microchip implementation for an associative neuron group is presented. This microchip is int...
While CMOS continues to be the technology of choice to enable a low-cost Radio Frequency Identificat...
Floating gate nonvolatile memory cells fabricated with a molybdenum gate triple well BeCMOS process ...
This paper presents a measurement system for research on nonvolatile memories, such as Flash, EPROM...
The complexity of analog VLSI systems is often limited by the number of pins on a chip rather than b...
Abstract—The complexity of analog VLSI systems is often limited by the number of pins on a chip rath...
A programmable voltage source using the Vertical Injection Punch-through based MOS EEPROM structure ...
A single-poly electrically erasable programmable ROM (EEPROM) cell compatible with standard CMOS pro...
In this paper, a thorough characterization of phase-change memory (PCM) cells was carried out, aimed...
A 128-pixel complementary metal-oxide-semiconductor (CMOS) image sensor array with analog nonvolatil...
A new single-poly-EEPROM cell compatible with standard CMOS processes is proposed. A pMOS tunneling ...
A floating capacitor with a MOS charge injector structure can be used as a nonvolatile memory. This ...
[[abstract]]A novel multilevel/analog electrically erasable programmable read only memory (EEPROM) c...
[[abstract]]A novel EEPROM memory cell with new program and erase operations fabricated by standard ...
[[abstract]]An analogue nonvolatile memory is presented, which is not only CMOS-compatible but also ...
A novel microchip implementation for an associative neuron group is presented. This microchip is int...
While CMOS continues to be the technology of choice to enable a low-cost Radio Frequency Identificat...
Floating gate nonvolatile memory cells fabricated with a molybdenum gate triple well BeCMOS process ...
This paper presents a measurement system for research on nonvolatile memories, such as Flash, EPROM...
The complexity of analog VLSI systems is often limited by the number of pins on a chip rather than b...
Abstract—The complexity of analog VLSI systems is often limited by the number of pins on a chip rath...
A programmable voltage source using the Vertical Injection Punch-through based MOS EEPROM structure ...
A single-poly electrically erasable programmable ROM (EEPROM) cell compatible with standard CMOS pro...
In this paper, a thorough characterization of phase-change memory (PCM) cells was carried out, aimed...
A 128-pixel complementary metal-oxide-semiconductor (CMOS) image sensor array with analog nonvolatil...