The automotive domain is witnessing a relentless transition to autonomous cars demanding high-performance processors to timely execute complex, critical, decision-making software. The other side of the coin is that high-performance processors include hardware features like shared multilevel caches and multiple cores that expose the system to significant security threats, challenge time predictability, and jeopardize reliable operation due to the use of advanced process technology. In this paper, we discuss how introducing randomization in the non-functional behavior of certain hardware components helps to achieve a three-fold objective while preserving high-average performance capabilities of high-performance processors: improving the secu...
Cache memories are one of the hardware resources with higher potential to reduce worst-case executio...
Cache randomization per se, and its viability for probabilistic timing analysis (PTA) of critical re...
Enabling timing analysis for caches has been pursued by the critical real-time embedded systems (CRT...
The automotive domain is witnessing a relentless transition to autonomous cars demanding high-perfor...
Time-randomized processor (TRP) architectures have been shown as one of the most promising approache...
Embedded computers control an increasing number of systems directly interacting with humans, while a...
Critical Real-Time Embedded Systems (CRTES) are the subset of embedded systems with timing constrain...
Cache memories have a huge impact on software's worst-case execution time (WCET). While enabling the...
Fault tolerance has often been assessed separately in safety-related real-time systems, which may le...
The most promising secure-cache design approaches use cache-set randomization to index cache content...
Due to the trends of centralizing the E/E architecture and new computing-intensive applications, hig...
International audienceThe rapid development of low power, high density, high performance SoCs has pu...
As software continues to control more system-critical functions in cars, its timing is becoming an i...
Car manufacturers relentlessly replace or augment the functionality of mechanical subsystems with el...
While hardware caches are generally effective at improving application performance, they greatly co...
Cache memories are one of the hardware resources with higher potential to reduce worst-case executio...
Cache randomization per se, and its viability for probabilistic timing analysis (PTA) of critical re...
Enabling timing analysis for caches has been pursued by the critical real-time embedded systems (CRT...
The automotive domain is witnessing a relentless transition to autonomous cars demanding high-perfor...
Time-randomized processor (TRP) architectures have been shown as one of the most promising approache...
Embedded computers control an increasing number of systems directly interacting with humans, while a...
Critical Real-Time Embedded Systems (CRTES) are the subset of embedded systems with timing constrain...
Cache memories have a huge impact on software's worst-case execution time (WCET). While enabling the...
Fault tolerance has often been assessed separately in safety-related real-time systems, which may le...
The most promising secure-cache design approaches use cache-set randomization to index cache content...
Due to the trends of centralizing the E/E architecture and new computing-intensive applications, hig...
International audienceThe rapid development of low power, high density, high performance SoCs has pu...
As software continues to control more system-critical functions in cars, its timing is becoming an i...
Car manufacturers relentlessly replace or augment the functionality of mechanical subsystems with el...
While hardware caches are generally effective at improving application performance, they greatly co...
Cache memories are one of the hardware resources with higher potential to reduce worst-case executio...
Cache randomization per se, and its viability for probabilistic timing analysis (PTA) of critical re...
Enabling timing analysis for caches has been pursued by the critical real-time embedded systems (CRT...