Interface Control Processes for Ni/Ge and Pd/Ge Schottky and Ohmic Contact Fabrication: Part One

Metal-semiconductor interfaces are an essential part of any nano-electronic device. One of the concerns in germanium based technology is the presence of Fermi-level pinning (FLP) which leads to large Schottky barrier heights (SBH) for electrons. Details of the factors that pin the Fermi level will be discussed in this chapter. In an Ohmic contact there is an almost unimpeded transfer of majority carriers across the interface. One way to achieve such a contact is by doping the semiconductor heavily enough so that tunneling is possible. Heavy doping is not always advantageous or possible, depending on the type of device being fabricated. Other ways are to locally incorporate dopant atoms at the metal-germanium interface or to insert an interlayer into the interface. In practice, however, the contact resistivity is very sensitive to the interlayer thickness and the temperature of annealing used during the fabrication process. The latter two ways of achieving an Ohmic contact are interface control processes as opposed to the first way which is a bulk process. In this chapter we present the essential theoretical and experimental details required for the examination of some of the novel interface control processes developed for the fabrication of NiGe/n-Ge and PdGe/n-Ge Schottky and Ohmic contacts