PRINGLE: A TEST BED FOR PARALLEL COMPUTER AND PARALLEL I/O ARCHITECTURES (SYSTOLIC ARRAY, DATAFLOW, ARRAY PROCESSOR)

The design and implementation of a multiple instruction stream, multiple data stream message-passing parallel computer called Pringle is described. Pringle was originally constructed to be a hardware emulator for the CHiP or Configurable, Highly Parallel computer. It consists of an ensemble of 64 identical processing elements, and 32 I/O processing elements. Each processing element is based on the Intel 8031 microprocessor chip and contains a small amount of read-write memory. Communication between processing elements is implemented using a high speed bus that emulates a reconfigurable point to point message passing network. It is shown that a multiple microprocessor parallel computer such as Pringle can be utilized effectively in the development of parallel computer algorithms. Its reconfigurable interconnection network allows researchers to experiment with various network topologies. The problem of designing an adequate I/O system for Pringle in particular and moderately fine grain ensemble machines in general is addressed. It is shown that for machines of this class, the I/O system must exhibit both a multiplicity of dedicated I/O processors and some degree of symmetry in the accessibility of these processors. The Pringle I/O system is presented as one solution to this problem. It solves the problem by distributing the I/O task among many dedicated I/O processing elements that are symmetrically accessible with respect to the computational processing elements. For other ensemble machines such as the CHiP, it is shown that full symmetry is not necessary to be able to provide adequate stream I/O services. In addition to these desirable characteristics, it is shown that the programmability or intelligence of the I/O processors increases the overall performance of the machine by allowing data conversion, data filtering and some degree of data restructuring to take place in the I/O subsystem rather than in the computational processing elements. As far as the file system to be implemented on the I/O system is concerned, the concept of a stream file is introduced. It is shown to be a data file implementation well suited for use in any message passing computer system