International audienceIn the past few years, novel assembly schemes, such as Flip Chip, 3D assemblies, and advanced low-k/ultralow-k dielectric materials have been introduced in the semiconductor industry. Aiming to develop and grant maturity milestones, standardized procedures are used to assess the assembly reliability. Among them, bump shear test provides a quantitative measure of the bonding strength between the Bump, UBM and pad structure. In this paper, some investigations on the failure mechanism induced by shear test are proposed. At first, it is shown experimentally that, for similar structures, the failure mode depends on the shear tool standoff. More precisely, high height values promote the cratering mode (i.e. fracture in the i...
The effect of aluminum pad surface morphology on flip-chip solder bump reliability is reported in th...
Presently, a number of bump metallurgies are used for flip chip and TAB technology. However, no conc...
This study compares high-speed bondtesting (shear and pull) with board level drop testing (BLDT) of ...
International audienceIn the past few years, novel assembly schemes, such as Flip Chip, 3D assemblie...
The electroplating-based flip chip process has many advantages over other solder bumping methods, wh...
[[abstract]]Probe-after-bump is the primary probing procedure for flip chip technology, since it doe...
Mechanical integrity of low-k dielectrics continues to be an important focus for advanced semiconduc...
The bumping process plays a critical role in flip chip technology. A low cost bumping process has be...
Area array technology is one of the main themes for IC packaging in the past decade. Ball grid array...
Mechanical integrity of low-k dielectric films remains a quality and reliability challenge for devic...
AbstractBall shear tests were investigated in terms of the effects of test parameters, i.e., shear h...
The reliability under impact loading is one of the major concerns for portable electronic products. ...
The Stud Bump Bonding (SBB) flip chip technology on Molded Interconnect Devices (MID) is a highly pr...
This paper reports the result of a study on the effect of aluminum pad surface morphology on the fli...
The BGA packages have many advantages over conventional modules in IC packaging industries. For BGA ...
The effect of aluminum pad surface morphology on flip-chip solder bump reliability is reported in th...
Presently, a number of bump metallurgies are used for flip chip and TAB technology. However, no conc...
This study compares high-speed bondtesting (shear and pull) with board level drop testing (BLDT) of ...
International audienceIn the past few years, novel assembly schemes, such as Flip Chip, 3D assemblie...
The electroplating-based flip chip process has many advantages over other solder bumping methods, wh...
[[abstract]]Probe-after-bump is the primary probing procedure for flip chip technology, since it doe...
Mechanical integrity of low-k dielectrics continues to be an important focus for advanced semiconduc...
The bumping process plays a critical role in flip chip technology. A low cost bumping process has be...
Area array technology is one of the main themes for IC packaging in the past decade. Ball grid array...
Mechanical integrity of low-k dielectric films remains a quality and reliability challenge for devic...
AbstractBall shear tests were investigated in terms of the effects of test parameters, i.e., shear h...
The reliability under impact loading is one of the major concerns for portable electronic products. ...
The Stud Bump Bonding (SBB) flip chip technology on Molded Interconnect Devices (MID) is a highly pr...
This paper reports the result of a study on the effect of aluminum pad surface morphology on the fli...
The BGA packages have many advantages over conventional modules in IC packaging industries. For BGA ...
The effect of aluminum pad surface morphology on flip-chip solder bump reliability is reported in th...
Presently, a number of bump metallurgies are used for flip chip and TAB technology. However, no conc...
This study compares high-speed bondtesting (shear and pull) with board level drop testing (BLDT) of ...