Can Run-time Reconfigurable Hardware be more Accessible?

In this paper, a new project named Context Switching Reconfigurable Hardware for Communication Systems (COSRECOS) is introduced. The project started autumn 2009 and consists of applying reconfigurable hardware technology (Field Programmable Gate Arrays - FPGAs) for designing high performance run-time reconfigurable computing architectures for communication systems. The overall goal of the project is to contribute in making run-time reconfigurable systems more feasible in general. This includes introducing architectures for reducing reconfiguration time as well as undertaking tool development. Case studies by applications in network and communication systems will be a part of the project. The paper describes how we plan to address the challenge of changing hardware configurations while a system is in operation. An overview of promising initial approaches is also included. Proceedings of the 2011 International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA’11, ISBN#: 1-60132-177-5), Editor: Toomas P. Plaks. Associate Editors: Shiu-Kai Chin, Pedro C. Diniz, William L. Harrison, Roman Lysecky, pp.: 255 – 262, Las Vegas, USA, 2011. ERSA'11, The International Conference on Engineering of Reconfigurable Systems and Algorithms: http://ersaconf.org/ersa1