A Leaf-cell Generator for Silicon Compilers

A program for the design of leaf cells for silicon compilers of digital VLSI (Very Large Scale Integrated) circuits, is being developed. This program uses rule based reasoning and genetic algorithmic search techniques, whenever each is appropriate. Leaf cells are subcircuits of a complexity comparable with SSI (Small Scale Integration) components such as one-bit adders, flip-flops or multiplexers. They typically contain between 10 to 100 transistors. Silicon compilers can use libraries of ready designed leaf cells or each leaf cell can be automatically generated [1] by synthesis tools such as the program we are developing. The main advantage of the synthesis approach is that circuit performance will not be sacrificed since a new, optimal layout will be produced whatever the complexity of the circuit and whenever the fabrication process is upgraded