Authorization, Protection, and Allocation of Memory in a Large System

In this dissertation, I rethink how an OS supports virtual memory. Classical virtual memory is an opaque abstraction of RAM, backed by demand paging. However, most systems today (from phones to data-centers) do not page, and indeed may require the performance benefits of non-paged physical memory, precise NUMA allocation, etc. Moreover, MMU hardware is now useful for other purposes, such as detecting page access or providing large page translation. Accordingly, the venerable VM abstraction in OSes like Windows and Linux has acquired a plethora of extra APIs to poke at the policy behind the illusion of a virtual address space. Instead, I present Barrelfish’s memory system which inverts this model. Applications explicitly manage their physical RAM of different types, and directly (though safely) program the translation hardware. Barrelfish’s memory system requires no virtualization support, and outperforms VMM-based approaches for all but the smallest working sets. We show that Barrelfish enables use-cases for virtual memory not possible in Linux today, and other use-cases are simple to program and on par with Linux’s performance. Finally, I show how Barrelfish’s capability system allows our memory model to scale to multiple cores. We present a set of algorithms which allow Barrelfish to process capability operations when capabilities exist on multiple cores without risking that different cores have different views of the global set of capabilities. The usual capability operations are sufficient to allow our memory model to work on multiple cores, as I implement all the memory model primitives as capability operations. We demonstrate that the capability operations retain relatively low-latency in the presence of capabilities which exist on multiple cores