Silicon tunnel FETs for digital and analogue applications

As number of transistors per unit area in integrated circuits increases, power dissipation of the chips becomes progressively important. Scaling of supply voltage VDD is an important measure to decrease dynamic Pdynamic and static Pstatic power consumption of integrated circuits. However, considering inherent limitation of MOSFETs, this either leads to low operating current or increased leakage current. The tunnel field effect transistor (TFET) is a promising alternative to go beyond this limitation to operate devices at very small supply voltage VDD due to non-thermal quantum mechanical band to band tunneling as the main carrier transport mechanism compared to thermal emission in MOSFETs.In this work, two different TFET design concepts based on point-tunneling andline-tunneling are investigated. In each case, the tunneling probability is optimized with regard to basic physical relations derived from the WKB approximation of band to band tunneling. The end goals are to achieve higher drive currents at lower supply voltages and subthermal (