Dynamic task management in MPSoC platformson

Today's submicron silicon technology enables integration of much more functionalities onto a single chip than ever before. At the same time, the gap between chip performance and capacity becomes larger and larger, and power as well as energy consumption issues become extremely critical. The Multi-Processor System-on-Chip (MPSoC) technology offers a promising solution to these problems from the system architecture perspective. The key is its task-level parallelism. By running tasks on multiple processors in parallel, MPSoCs are able to achieve high performance at a low clock frequency, consequently at a low supply voltage, which largely reduces power and energy consumption. This implies that efficient task management is highly important in MPSoCs. Furthermore, in today's embedded systems, the system behavior is very dynamic, which naturally calls for dynamic task management to enable the system to adapt to different situations and scenarios.Dynamic task management support in MPSoCs is a challenging task. It should consider both efficiency and flexibility, which are typically contradictory to each other. In literature, most implementations of dynamic task management systems are based on either Reduced Instruction Set Computers (RISCs) or Application-Specific Integrated Circuits (ASICs). However, they can only partly meet the requirements of good dynamic task management. While the former are not efficient enough for large systems, the latter lack in flexibility. This thesis proposes an implementation based on the concept of Application-Specific Instruction-set Processors (ASIPs) in order to combine the flexibility of RISCs and the efficiency of ASICs. As a result, an ASIP called OSIP (Operating System application-specific Instruction-set Processor) is developed. It employs special architectural features and customized instructions to speed up typical operations in dynamic task management, such as task-level comparisons and operations related to list-based data structures.The efficiency of OSIP is compared with a RISC-based and a hypothetical extremely fast ASIC task manager in a system context, considering different system sizes and OSIP workloads. Especially, the impact of communication architectures on the OSIP efficiency is investigated. The evaluation results confirm the high efficiency of OSIP in task management, and show that a well-designed communication architecture is important for full exploitation of the OSIP efficiency. The advantages of the OSIP flexibility are highlighted by extending the functionality of OSIP in software to support an advanced spinlock control mechanism based on a-priori application knowledge. With this extension, significant performance improvement is achieved, and the OSIP-based systems have even better performance than the systems using the hypothetical ASIC task manager in many cases. Based on the analysis of the OSIP efficiency and flexibility, it is clearly shown that an ASIP task manager can meet the challenges of dynamic task management.The task management in OSIP-based systems is organized in a centralized way, which is well suited for MPSoCs using traditional bus-based communication architectures. However, Networks-on-Chip (NoCs) are nowadays more and more widely used in modern large-scale systems due to their advantages in scalability. This communication architecture paradigm presents distributive architectural characteristics, which somehow do not fit into the concept of using a central task manager. In this thesis, a proxy-based approach is proposed for the integration of OSIP into NoC-based systems, which can effectively convert remote communications with OSIP over a NoC into local communications through a simple bus, thereby reducing the communication overhead caused by the task management of the OSIP