System design and implementation of digital centric multi-standard transmitters

Wireless communication has become an essential part of our daily life. Considering the most essential wireless device, which is the cell phone we all carry around, it is obvious that the consumer does not care about the integrated wireless transceiver but about applications; calling, texting, streaming, connecting to the car’s audio system, access to hotspots, and fast internet usage all over the world are only a few examples of these applications. To accommodate these high data rates two standards are especially suitable: 3GPP LTE und IEEE 802.11g (WLAN). Based on OFDM they both require a transmitter with a high linearity. However, wireless communication is not exclusively about high data rates. It is also about flexibility and legacy support. UMTS and GSM will remain active for years. The access to modern CMOS technologies enables a high integration of fast DSPs. However, classic analog circuits, with their transistors operating in the linear region, do not benefit from smaller transistors. On the contrary, short channel effects such as velocity saturation or subthreshold and parasitic gate currents limit the minimum transistor length in analog circuits. The direct-digital to RF convertor (DDRC) enables the required flexibility and scalability. The unit cells of the DAC contain a switch-mode mixer stage. This DDRC is the key element of digital centric multistandard transmitters (DCMT).This thesis covers system design and implementation of DCMT prototypes. The aim of the thesis is to implement a DCMT that covers a selection of state-of-the-art wireless and mobile communication standards. The thesis provides a guide on how to implement these transmitters. The major issues in the implementation of a DCMT are identified and solved. General limitations of a DCMT compared to the classic approach are named. Three prototypes were implemented in a 65nm technology.The final prototype supports LTE, WLAN, and UMTS operation in multiple bands. The non-idealities of the DDRC are compensated digitally. The SSB sinusoid output power of the DDRC reaches 11.9dBm at 2.4GHz. It fulfills all WLAN requirements at the 2.4GHz ISM band with an output power of 1dBm. It also enables LTE transmission in Band 1 and 7 (1.98GHz and 2.6GHz). The signals are converted form the digital baseband to the RF domain. The performance is comparable to state-of-the-art multi-standard transmitters. The transmitter contains an arbitrary sample rate conversion (ASRC) for complex modulation schemes, a highly integrated DSP, and a high-speed interface for the baseband data