A novel methodology for the concurrent test of partial and dynamically reconfigurable SRAM-based FPGAs

This poster presents the first truly non-intrusive structural concurrent test approach, with the objective of testing partially and dynamically reconfigurable SRAM-based FPGAs without disturbing their operation. This is accomplished by using a new methodology to carry out the replication of active Configurable Logic Blocks (CLBs), i.e. CLBs that are part of an implemented function that is actually being used by the system, releasing it to be tested in a way that is completely transparent to the system