Real-time fault injection using enhanced on-chip debug infrastructures

The rapid increase in the use of microprocessor-based systems in critical areas, where failures imply risksto human lives, to the environment or to expensive equipment, significantly increased the need fordependable systems, able to detect, tolerate and eventually correct faults. The verification and validationof such systems is frequently performed via fault injection, using various forms and techniques. However,as electronic devices get smaller and more complex, controllability and observability issues, and sometimesreal time constraints, make it harder to apply most conventional fault injection techniques. Thispaper proposes a fault injection environment and a scalable methodology to assist the execution ofreal-time fault injection campaigns, providing enhanced performance and capabilities. Our proposedsolutions are based on the use of common and customized on-chip debug (OCD) mechanisms, presentin many modern electronic devices, with the main objective of enabling the insertion of faults in microprocessormemory elements with minimum delay and intrusiveness. Different configurations wereimplemented starting from basic Components Off-The-Shelf (COTS) microprocessors, equipped withreal-time OCD infrastructures, to improved solutions based on modified interfaces, and dedicated OCDcircuitry that enhance fault injection capabilities and performance. All methodologies and configurationswere evaluated and compared concerning performance gain and silicon overhea