An FPGA Implementation of Frequency Output

Digital frequency input and output (typically in the range 1 Hz to 100 kHz) for data transmission are employed in many industrial applications. This paper provides the following elaborations of the ISIE'07 conference paper. A thorough literature review suggests that previous techniques can be classified into three basic approaches. Theoretical expressions for the errors of each are derived and compared with the new approach developed by the authors. Each method has been implemented in a more recent field programmable gate array architecture (Spartan 3), and the results are consistent with the theoretical values. The new method provides a precision of 6 × 10-6% or better for all frequencies, based on a 40-MHz clock. © 2009 IEEE